ADG623 AD [Analog Devices], ADG623 Datasheet - Page 5

• Manufacturer Part Number: ADG623
• Description: CMOS +-5 V/ +5V 4 OHM DUAL SPST SWITCHES
• Manufacturer: AD [Analog Devices]

V
V
GND
I
I
S
D
IN
R
∆R
R
I
I
I
V
V
V
I
C
C
C
t
t
t
Charge Injection
Crosstalk
Off Isolation
Bandwidth
Insertion Loss
DD
SS
S
D
D
INL
ON
OFF
BBM
DD
SS
ON
FLAT(ON)
D
INL
INH
S
D
D
, I
(OFF)
(OFF)
ON
, C
(V
(OFF)
(OFF)
(I
S
INH
(ON)
S
S
)
(ON)
)
The frequency response of the “ON” switch.
Most Positive Power Supply Potential.
Most Negative Power Supply in a Dual Supply Application. In single supply applications, this should be tied
to ground at the device.
Ground (0 V) Reference
Positive Supply Current
Negative Supply Current
Source Terminal. May be an input or output.
Drain Terminal. May be an input or output.
Logic Control Input
Ohmic resistance between D and S.
On resistance match between any two Channels i.e., R
Flatness is defined as the difference between the maximum and minimum value of on resistance as measured
over the specified analog signal range.
Source Leakage Current with the switch “OFF.”
Drain Leakage Current with the switch “OFF.”
Channel Leakage Current with the switch “ON.”
Analog Voltage on Terminals D, S.
Maximum Input Voltage for Logic “0.”
Minimum Input Voltage for Logic “1.”
Input Current of the Digital Input
“OFF” Switch Source Capacitance
“OFF” Switch Drain Capacitance
“ON” Switch Capacitance
Delay between applying the digital control input and the output switching on.
Delay between applying the digital control input and the output switching off.
“OFF” time or “ON” time measured between the 90% points of both switches, when switching from one
address state to another.
A measure of the Glitch Impulse transfered from the Digital input to the Analog output during switching.
A measure of unwanted signal that is coupled through from one channel to another as a result of parasitic
capacitance.
A measure of unwanted signal coupling through an “OFF” switch.
The loss due to the ON resistance of the Switch.
PIN CONFIGURATION
GND
V
IN2
S1
D1
SS
TERMINOLOGY
10-Lead SOIC
NC = NO CONNECT
1
2
3
4
5
(Not to Scale)
(RM-10)
ADG621/
ADG622/
ADG623
TOP VIEW
10
9
8
7
6
V
IN1
D2
S2
NC
DD
ON
max – R
ON
ADG621/ADG622/ADG623
min.