ADUC814_02 AD [Analog Devices], ADUC814_02 Datasheet - Page 7

• Manufacturer Part Number: ADUC814_02
• Description: MicroConverter, Small Package 12-Bit ADC with Embedded FLASH MCU
• Manufacturer: AD [Analog Devices]

TIMING SPECIFICATIONS
Parameter
CLOCK INPUT (External Clock Driven XTAL1)
NOTES
1
2
3
4
5
6
REV. 0
AC inputs during testing are driven at DV
for a Logic 0, as shown in Figure 2.
For timing purposes, a port pin is no longer floating when a 100 mV change from the load voltage occurs. A port pin begins to float when a 100 mV change from the
loaded V
CLOAD for all outputs = 80 pF, unless otherwise noted.
ADuC814 internal PLL locks onto a multiple 512 times the external crystal frequency of 32.768 kHz to provide a stable 16.777216 MHz internal clock for the
system. The core can operate at this frequency or at a binary submultiple called Core_CLK, selected via the PLLCON SFR.
This number is measured at the default Core_CLK operating frequency of 2.09 MHz.
ADuC814 machine cycle time is nominally defined as 12/Core_CLK.
t
t
t
t
t
1/t
t
t
CK
CKL
CKH
CKR
CKF
CORE
CYC
CORE
OH
/V
OL
level occurs, as shown in Figure 2.
XTAL1 Period
XTAL1 Width Low
XTAL1 Width High
XTAL1 Rise Time
XTAL1 Fall Time
ADuC814 Core Clock Frequency
ADuC814 Core Clock Period
ADuC814 Machine Cycle Time
DV
DD
– 0.5V
0.45V
DD
– 0.5 V for a Logic 1 and 0.45 V for a Logic 0. Timing measurements are made at V
1, 2, 3
0.2DV
0.2DV
TEST POINTS
Figure 2. Timing Waveform Characteristics
DD
DD
(AV
specifications T
– 0.1V
+ 0.9V
t
CKH
5
DD
6
= 2.7 V to 3.6 V or 4.75 V to 5.25 V, DV
4
Figure 1. XTAL1 Input
MIN
to T
32.768 kHz External Crystal
Min
0.131
0.72
–7–
V
t
CKL
LOAD
MAX
, unless otherwise noted.)
V
V
LOAD
LOAD
t
– 0.1V
+ 0.1V
CKR
Typ
30.52
15.16
15.16
20
20
0.476
5.7
t
CK
REFERENCE
POINTS
TIMING
DD
Max
16.78
91.55
= 2.7 V to 3.6 V or 4.75 V to 5.25 V; all
t
CKF
V
V
LOAD
LOAD
IH
Unit
µs
µs
µs
ns
ns
MHz
µs
µs
min for a Logic 1, and V
– 0.1V
+ 0.1V
V
LOAD
ADuC814
1
1
1
Figure
1
1
IL
max