ADUC814_02 AD [Analog Devices], ADUC814_02 Datasheet - Page 15

• Manufacturer Part Number: ADUC814_02
• Description: MicroConverter, Small Package 12-Bit ADC with Embedded FLASH MCU
• Manufacturer: AD [Analog Devices]

Pin No.
16
17
18-21
18
19
20
21
22-24
22
22
23
24
25
26
27
28
*I = Input, O = Output, I/O = Input and Output, and S = Supply.
NOTES
1. SET implies a Logic 1 state and CLEARED implies a Logic 0 state, unless otherwise stated.
2. SET and CLEARED also imply that the bit is set or automatically cleared by the ADuC814 hardware, unless otherwise stated.
3. User software should not write 1s to Reserved or Unimplemented Bits as they may be used in future products.
REV. 0
Mnemonic
VREF
CREF
P1.4–P1.7
P1.4/ADC2
P1.5/ADC3
P1.6/ADC4/DAC0 I/O
P1.7/ADC5/DAC1 I/O
P3.5–P3.7
P3.5/T1
P3.5/SS/EXTCLK
P3.6/MISO
P3.7/MOSI
SCLOCK
XTAL1
XTAL2
DV
DD
I
I
I
I/O
I/O
I/O
I/O
I/O
Type*
I/O
I
I/O
I
O
S
Function
Reference Input/Output. This pin is connected to the internal reference through a switch
and is the reference source for the analog-to-digital converter. The nominal internal
reference voltage is 2.5 V, which appears at the pin. This pin can be used to connect
an external reference to the analog-to-digital converter by setting ADCCON1.6 to 1.0.
Connect 0.1 µF between this pin and AGND.
Decoupling input for on-chip reference. Connect 0.1 µF between this pin and AGND.
These pins have no digital output drivers, i.e., they can only function as digital inputs,
for which 0 must be written to the Port Bit. These port pins also have the following
analog functionality.
ADC Input Channel 2, Selected via ADCCON2 SFR
ADC Input Channel 2, Selected via ADCCON2 SFR
ADC Input Channel 4, Selected via ADCCON2 SFR. The voltage DAC Channel 0 can
also be configured to appear on P1.6
ADC Input Channel 5, Selected via ADCCON2 SFR. The voltage DAC Channel 1 can
also be configured to appear on P1.7
P3.5–P3.7 are bidirectional port pins with internal pull-up resistors. Port 3 pins that have
1s written to them are pulled high by the internal pull-up resistors, and in that state, can
be used as inputs. As inputs, Port 3 pins being pulled externally low will source current
because of the internal pull-up resistors. When driving a 0-to-1 output transition, a
strong pull-up is active during S1 of the instruction cycle. Port 3 pins also have various
secondary functions that are described below.
Timer/Counter 1 Input. P3.5–P3.7 pins also have SPI interface functions. To enable
these functions, Bit 0 of the CFG814 SFR must be set to 1.
This pin also functions as the slave select input for the SPI interface when the device is
operated in Slave Mode. P3.5 can also function as an input for an external clock. This clock
effectively bypasses the PLL. This function is enabled by setting Bit 1 of the CFG814 SFR.
SPI Master Input/Slave Output Data Input/Output Pin
SPI Master Output/Slave Input Data Input/Output Pin
Serial Clock Pin for SPI Serial Interface Clock
Input to the Crystal Oscillator Inverter
Output from the Crystal Oscillator Inverter
Analog Positive Supply Voltage, 3 V or 5 V
–15–
ADuC814