ADUC812_03 AD [Analog Devices], ADUC812_03 Datasheet - Page 53

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ADUC812_03

Manufacturer Part Number
ADUC812_03
Description
Manufacturer
AD [Analog Devices]
Datasheet
Parameter
SPI MASTER MODE TIMING (CPHA = 0)
t
t
t
t
t
t
t
t
t
t
REV. E
DAV
DOSU
DSU
DHD
DF
DR
SF
SL
SH
SR
(CPOL = 0)
(CPOL = 1)
SCLOCK
SCLOCK
SCLOCK Low Pulsewidth
SCLOCK High Pulsewidth
Data Output Valid after SCLOCK Edge
Data Output Setup before SCLOCK Edge
Data Input Setup Time before SCLOCK Edge
Data Input Hold Time after SCLOCK Edge
Data Output Fall Time
Data Output Rise Time
SCLOCK Rise Time
SCLOCK Fall Time
MOSI
MISO
t
DOSU
t
DSU
MSB IN
Figure 57. SPI Master Mode Timing (CPHA = 0)
t
MSB
DHD
t
SH
t
DF
t
DAV
t
SL
t
DR
BIT 6–1
BIT 6–1
–53–
Min
100
100
LSB IN
t
SR
LSB
Typ
330
330
10
10
10
10
t
SF
Max
50
25
25
25
25
150
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ADuC812

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