ADUC812_03 AD [Analog Devices], ADUC812_03 Datasheet - Page 50

• Manufacturer Part Number: ADUC812_03
• Manufacturer: AD [Analog Devices]

ADuC812
Parameter
UART TIMING (Shift Register Mode)
t
t
t
t
t
XLXL
QVXH
DVXH
XHDX
XHQX
(OUTPUT CLOCK)
Serial Port Clock Cycle Time
Output Data Setup to Clock
Input Data Setup to Clock
Input Data Hold after Clock
Output Data Hold after Clock
(OUTPUT DATA)
(INPUT DATA)
ALE (O)
RxD
RxD
TxD
Figure 54. UART Timing in Shift Register Mode
MSB
0
MSB
t
DVXH
t
QVXH
BIT6
Min
700
300
0
50
1
BIT6
12 MHz
Typ
1.0
–50–
t
t
XHDX
XHQX
Max
Min
10t
2t
0
2t
BIT1
CK
CK
6
CK
t
XLXL
+ 133
– 117
BIT1
– 133
Variable Clock
Typ
12t
LSB
7
CK
SET RI
SET TI
LSB
OR
Max
Unit
µs
ns
ns
ns
ns
REV. E