ADUC702 AD [Analog Devices], ADUC702 Datasheet - Page 32

• Manufacturer Part Number: ADUC702
• Description: Precision Analog Microcontroller 12-bit Analog I/O, ARM7TDMI MCU
• Manufacturer: AD [Analog Devices]

ADuC702x Series
NONVOLATILE FLASH/EE MEMORY
FLASH/EE MEMORY OVERVIEW
The ADuC702x incorporates Flash/EE memory technology on-
chip to provide the user with non-volatile, in-circuit
reprogrammable memory space.
Like EEPROM, Flash memory can be programmed in-system at
a byte level, although it must first be erased; the erase being
performed in page blocks. Thus, Flash memory is often and
more correctly referred to as Flash/EE memory.
Overall, Flash/EE memory represents a step closer to the ideal
memory
programmability, high density, and low cost. Incorporated in
the ADuC702x, Flash/EE memory technology allows the user to
update program code space in-circuit, without the need to
replace one time programmable (OTP) devices at remote
operating nodes.
FLASH/EE MEMORY AND THE ADUC702X
The ADuC702x contains a 64 kByte array of Flash/EE Memory.
The lower 62 Kbytes is available to the user and the upper 2
kBytes of this Flash/EE program memory array contain
permanently embedded firmware, allowing in circuit serial
download. These 2 Kbytes of embedded firmware also contain a
power-on configuration routine that downloads factory
calibrated coefficients to the various calibrated peripherals
(ADC, temperature sensor, bandgap references and so on). This
2 kByte embedded firmware is hidden from user code.
The 62kBytes of Flash/EE memory can be programmed in-
circuit, using the serial download mode or the JTAG mode
provided or via parallel programming.
The ADuC702x facilitates code download via the standard
UART serial port or via the I2C port. The ADuC702x will enter
serial download mode after a reset or power cycle if the BM pin
is pulled low through an external 1kOhm resistor. Once in serial
download mode, the user can download code to the full
62kBytes of Flash/EE memory while the device is in circuit in
its target application hardware. A PC serial download
executable is provided as part of the development system for
serial downloading via the UART. An application note is
available at
protocol for serial downloading via the UART and I2C.
(2) Parallel Programming
The parallel programming protocol allows the on-chip Flash/EE
memory be programmed by industry standard third party
programmers.
(1) Serial Downloading (In-Circuit Programming)
device that
www.analog.com/microconverter
includes
non-volatility,
describing the
in-circuit
Rev. PrB | Page 32 of 80
(3) JTAG access
The JTAG protocol uses the on-chip JTAG interface to facilitate
code download and debug.
FLASH/EE MEMORY SECURITY
The 62kByte of Flash/EE memory available to the user can be
read and write protected.
Bit 31 of the FEEPRO/FEEHIDE MMR protects the 62kBytes
from being read through JTAG and also in parallel
programming mode. The other 31 bits of this register protect
writing to the flash memory, each bit protects 4 pages, i.e.
2kBytes. Write protection is activated for all type of access.
There are two levels of protection:
- Protection can be set and removed by writing directly into
FEEHIDE MMR.
- FEEPRO can be protected by a key to avoid direct access to
FEEPRO. The key is saved once and must be entered again to
modify FEEPRO. A mass erase will set the key back to 0xFFFF
but will also erase all the user code.
Sequence to write the key:
1. Enter an address in FEEADR.
2. Do a single READ command, wait for the read to be
successful by monitoring FEESTA.
3. Run a verify command.
4. Write the bit in FEEPRO corresponding to the page to be
protected.
5. Enable key protection by setting bits 7 to 4 of FEEMOD.
6. Write a 32 bit key in FEEADR, FEEDAT
7. Run the write key command 0x0C in FEECON, wait for the
read to be successful by monitoring FEESTA.
To remove or modify the protection the same sequence can be
used with a modified value of FEEPRO.
The sequence above is illustrated in the following example, this
protects writing pages 4 to 7 of the FLASH:
FEEADR = 0x800;
FEECON=0x01;
while (!(FEESTA & 0x01)){}
FEECON=0x04;
FEEPRO=0xFFFFFFFD;
FEEMOD=(FEEMOD & 0xF0);
FEEADR=0xAA55;
FEEDAT=0xAA55;
FEECON= 0x0C;
while (!(FEESTA & 0x01)){}
Preliminary Technical Data
//Any address,
//Read command
//Wait for read
//Verify Command
//Protect pages 4 to 7
//Write key enable
//16 bit key value
//16 bit key value
// Write key command
//Wait for command