A6850 ALTERA [Altera Corporation], A6850 Datasheet - Page 2

• Manufacturer Part Number: A6850
• Description: Asynchronous Communications Interface Adapter
• Manufacturer: ALTERA [Altera Corporation]

a6850 Asynchronous Communications Interface Adapter Data Sheet
82
Table 1. a6850 Ports
ncts
ndcd
e
nreset
rs
rnw
rxclk
rxdata
txclk
cs[2..0]
di[7..0]
nirq
nrts
txdata
do[7..0]
Name
Input
Input
Input
Input
Input
Input
Input
Input
Input
Input
Input
Output
Output
Output
Output
Type
Table 1
Polarity
Low
Low
High
Low
–
Low
–
–
–
–
–
Low
Low
–
–
describes the input and output ports of the a6850.
Clear to send, a modem signal name. The ncts input inhibits the
assertion of the transmit data register empty (tdre) status bit.
Data carrier detect, a modem signal name. When the ndcd signal
transitions from low to high, an interrupt to the microprocessor is
generated.
Enable for the microprocessor interface. When e is high, the
microprocessor can access the registers.
Asynchronous reset for the registers and control logic. The nreset
pin was not included in the original MC6850 device.
Register select. This input selects the register based on rnw. If rnw
is high (signaling a read operation), then rs = 1 selects the receiver
data register and rs = 0 selects the status register. However, if rnw
is low (signaling a write operation), then rs = 1 selects the
transmitter data register and rs = 0 selects the control register.
Read/write register controls. When rnw is high, the microprocessor
reads the registers; when rnw is low, the microprocessor writes to
the registers.
Receive clock. The receive control register samples rxdata based
on rxclk and the state of the counter divide select (cds) bits in the
control register.
Receive data. Serial data input from the modem or peripheral.
Transmit clock. Data is asserted to txdata on the falling edge of
txclk.
Chip select from the microprocessor. Chip select must be in the 110
state for the a6850 to be selected.
Parallel data input from the microprocessor or other controlling
device.
Interrupt request to microprocessor.
Request to send. Bits 5 and 6 (transmitter control bits) of the control
register set the nrts bit. The nrts signal is asserted when bit 6 is
low, or bits 5 and 6 are both high.
Transmit data. Serial output to the modem or peripheral.
Parallel data output to the microprocessor or other controlling device.
Description
Altera Corporation