PCA6416A NXP [NXP Semiconductors], PCA6416A Datasheet - Page 10

• Manufacturer Part Number: PCA6416A
• Description: Low-voltage translating 16-bit I2C-bus/SMBus I/O expander
• Manufacturer: NXP [NXP Semiconductors]

NXP Semiconductors
PCA6416A
Product data sheet
7.5 I/O port
7.6 Power-on reset
When an I/O is configured as an input, FETs Q1 and Q2 are off, which creates a
high-impedance input. The input voltage may be raised above V
5.5 V.
If the I/O is configured as an output, Q1 or Q2 is enabled, depending on the state of the
Output port register. In this case, there are low-impedance paths between the I/O pin and
either V
recommended levels for proper operation.
When power (from 0 V) is applied to V
PCA6416A in a reset condition until V
condition is released and the PCA6416A registers and I
initializes to their default states. After that, V
back up to the operating voltage for a power-reset cycle. See
requirements”.
Fig 8.
configuration
write polarity
shift register
shift register
shift register
write pulse
read pulse
data from
data from
data from
pulse
pulse
write
DD(P)
On power-up or reset, all registers return to default values.
Simplified schematic of P0_0 to P1_7
or V
configuration
register
D
CK
All information provided in this document is subject to legal disclaimers.
FF
SS
. The external voltage applied to this I/O pin should not exceed the
Q
Q
Rev. 1 — 11 September 2012
Low-voltage translating 16-bit I
output port
register
D
CK
FF
Q
DD(P)
DD(P)
input port
register
polarity
inversion
register
D
CK
D
CK
, an internal power-on reset holds the
has reached V
FF
FF
DD(P)
Q
Q
must be lowered to below V
Q1
2
C-bus/SMBus state machine
POR
2
Q2
C-bus/SMBus I/O expander
Section 9.2 “Power-on reset
. At that time, the reset
DD(P)
PCA6416A
ESD
protection
diode
to a maximum of
© NXP B.V. 2012. All rights reserved.
POR
output port
register data
V
P0_0 to P0_7
P1_0 to P1_7
V
input port
register data
to INT
polarity
inversion
register data
DD(P)
SS
002aaf538
and
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