SAF-XC164S-32F20F INFINEON [Infineon Technologies AG], SAF-XC164S-32F20F Datasheet - Page 65
![no-image](/images/no-image-200.jpg)
SAF-XC164S-32F20F
Manufacturer Part Number
SAF-XC164S-32F20F
Description
16-Bit Single-Chip Microcontroller with C166SV2 Core
Manufacturer
INFINEON [Infineon Technologies AG]
Datasheet
1.SAF-XC164S-32F20F.pdf
(76 pages)
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
SAF-XC164S-32F20F BB
Manufacturer:
Infineon Technologies
Quantity:
10 000
4.4.2
The XC164S’s Flash module delivers data within a fixed access time (see
Accesses to the Flash module are controlled by the PMI and take 1 + WS clock cycles,
where WS is the number of Flash access waitstates selected via bitfield WSFLASH in
register IMBCTRL. The resulting duration of the access phase must cover the access
time
available speed grade as well as on the actual system frequency.
Note: The Flash access waitstates only affect non-sequential accesses. Due to
Table 17
Parameter
Flash module access time (Standard)
Programming time per 128-byte block
Erase time per sector
1) The actual access time is also influenced by the system frequency, so the frequency ranges are not fully linear.
2) Programming and erase time depends on the system frequency. Typical values are valid for 40 MHz.
Example: For an operating frequency of 40 MHz (clock cycle = 25 ns), Standard devices
must be operated with 2 waitstates: ((2 + 1) × 25 ns) ≥ 70 ns.
Table 18
Table 18
Required Waitstates
0 WS (WSFLASH = 00
1 WS (WSFLASH = 01
2 WS (WSFLASH = 10
Note: The maximum achievable system frequency is limited by the properties of the
Data Sheet
See
t
ACC
prefetching mechanisms, the performance for sequential accesses (depending on
the software structure) is only partially influenced by waitstates.
In typical applications, eliminating one waitstate increases the average
performance by 5% … 15%.
respective derivative, i.e. 40 MHz (or 20 MHz for xxx-32F20F devices).
Table 18
indicates the interrelation of waitstates, system frequency, and speed grade.
of the Flash array. Therefore, the required Flash waitstates depend on the
On-chip Flash Operation
.
Flash Characteristics (Operating Conditions apply)
Flash Access Waitstates
B
B
B
)
)
)
63
Symbol
t
t
t
ACC
PR
ER
Frequency Range for Standard Flash
Speed
f
f
f
CPU
CPU
CPU
CC
CC
CC
≤ 16 MHz
≤ 28 MHz
≤ 40 MHz
Min.
–
–
–
Limit Values
Electrical Parameters
Typ.
2
–
200
2)
2)
Max.
70
5
500
Derivatives
XC164S-32
Table 17
V1.0, 2006-08
1)
Unit
ns
ms
ms
).