AT89C51CC02CA-TDSUM ATMEL [ATMEL Corporation], AT89C51CC02CA-TDSUM Datasheet - Page 89

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AT89C51CC02CA-TDSUM

Manufacturer Part Number
AT89C51CC02CA-TDSUM
Description
Enhanced 8-bit Microcontroller with CAN Controller and Flash
Manufacturer
ATMEL [ATMEL Corporation]
Datasheet
Time Trigger
Communication (TTC)
and Message Stamping
Figure 44. Block Diagram of CAN Timer
4126J–CAN–05/06
CLOCK
CANSTCH.4
CANSTCH.5
Fcan
RXOK i
TXOK i
CANSTMPH & CANSTMPL
÷ 6
The T89C51CC02 has a programmable 16-bit Timer (CANTIMH&CANTIML) for mes-
sage stamp and TTC.
This CAN Timer starts after the CAN controller is enabled by the ENA bit in the CANG-
CON register.
Two modes in the timer are implemented:
Note:
The CAN Timer works in a roll-over from FFFFh to 0000h which serves as a time base.
When the timer roll-over from FFFFh to 0000h, an interrupt is generated if the ETIM bit
in the interrupt enable register IEN1 is set.
CANTCON
CANTIMH & CANTIML
Time Trigger Communication:
Message Stamping
Capture of this timer value in the CANTTCH & CANTTCL registers on Start
Of Frame (SOF) or End Of Frame (EOF), depending on the SYNCTTC bit in
the CANGCON register, when the network is configured in TTC by the TTC
bit in the CANGCON register.
In this mode, CAN only sends the frame once, even if an error occurs.
Capture of this timer value in the CANSTMPH & CANSTMPL registers of the
message object which received or sent the frame.
All messages can be stamps.
The stamping of a received frame occurs when the RxOk flag is set.
The stamping of a sent frame occurs when the TxOk flag is set.
CANGCON.1
CANTTCH & CANTTCL
ENA
When 0xFFFF to 0x0000
CANGCON.5
TTC
CANGCON.4
SYNCTTC
AT/T89C51CC02
SOF on CAN frame
EOF on CAN frame
OVRTIM
CANGIT.5
89

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