AT89C51CC02CA-TDSUM ATMEL [ATMEL Corporation], AT89C51CC02CA-TDSUM Datasheet - Page 100

• Manufacturer Part Number: AT89C51CC02CA-TDSUM
• Description: Enhanced 8-bit Microcontroller with CAN Controller and Flash
• Manufacturer: ATMEL [ATMEL Corporation]

100
AT/T89C51CC02
Table 64. CANIE Register
CANIE (S:C3h) – CAN Enable Interrupt message object Registers
Reset Value = xxxx 0000b
Table 65. CANBT1 Register
CANBT1 (S:B4h) – CAN bit Timing Registers 1
Note:
No default value after reset.
Bit Number
Bit Number
7
7
-
-
7 - 4
3 - 0
6 - 1
7
0
1. The CAN controller bit timing registers must be accessed only if the CAN controller is
disabled with the ENA bit of the CANGCON register set to 0.
See Figure 41.
BRP 5
6
6
-
Bit Mnemonic
Bit Mnemonic
IECH3:0
BRP5:0
-
-
-
BRP 4
5
5
-
Description
Reserved
The values read from these bits are indeterminate. Do not set these
bits.
Enable Interrupt by Message Object
0 - disable IT.
1 - enable IT.
IECH3:0 = 0b 0000 1100 -> Enable IT’s of message objects 3 & 2.
Description
Reserved
The value read from this bit is indeterminate. Do not set this bit.
Baud Rate Prescaler
The period of the CAN controller system clock Tscl is
programmable and determines the individual bit timing.
Reserved
The value read from this bit is indeterminate. Do not set this bit.
BRP 3
4
4
-
IECH 3
BRP 2
3
3
Tscl =
BRP[5..0] + 1
IECH 2
BRP 1
F
CAN
2
2
IECH 1
BRP 0
1
1
4126J–CAN–05/06
(1)
IECH 0
0
0
-