AT89C5122 ATMEL [ATMEL Corporation], AT89C5122 Datasheet - Page 117

• Manufacturer Part Number: AT89C5122
• Description: MICROCONTROLLER WITH USB AND SMART CARD READER INTERFACES
• Manufacturer: ATMEL [ATMEL Corporation]

Registers
4202D–SCR–06/05
Table 64. USB Global Control Register - USBCON (S:BCh)
Reset Value = 0000 0000b
Number
USBE
Bit
7
6
5
4
3
2
1
0
7
Mnemonic
SDRMWUP
SUSPCLK
RMWUPE
DETACH
FADDEN
SUSPCLK
UPRSM
CONFG
USBE
Bit
6
Description
USB Enable
Set this bit to enable the USB controller.
Clear this bit to disable and reset the USB controller, to disable the USB
transceiver and to disable the USB controller clock inputs.
Suspend USB Clock
Set this bit to disable the 48MHz clock input (Resume Detection is still active).
Clear this bit to enable the 48MHz clock input.
Send Remote Wake-up
Set this bit to force an external interrupt on the USB controller for Remote Wake
UP purpose.
An upstream resume is send only if the bit RMWUPE is set, all USB clocks are
enabled AND the USB bus was in SUSPEND state for at least 5 ms. See UPRSM
below. This bit is cleared by software.
Detach Command
Set this bit to simulate a Detach on the USB line. The
floating state.
Clear this bit to maintain V
Upstream Resume (read only)
This bit is set by hardware when SDRMWUP has been set and if RMWUPE is
enabled.
This bit is cleared by hardware after the upstream resume has been sent.
Remote Wake-Up Enable
Set this bit to enabled request an upstream resume signaling to the host.
Clear this bit otherwise.
Note: Do not set this bit if the host has not set the DEVICE_REMOTE_WAKEUP
feature for the device.
Configured
This bit should be set by the device firmware after a SET_CONFIGURATION
request with a non-zero value has been correctly processed.
It should be cleared by the device firmware when a SET_CONFIGURATION
request with a zero value is received. It is cleared by hardware on hardware reset
or when an USB reset is detected on the bus (SE0 state for at least 32 Full Speed
bit times: typically 2.7 µs).
Function Address Enable
This bit should be set by the device firmware after a successful status phase of a
SET_ADDRESS transaction.
It should not be cleared afterwards by the device firmware. It is cleared by
hardware on hardware reset or when an USB reset is received (see above).
When this bit is cleared, the default function address is used (0).
SDRMWUP
5
DETACH
4
REF
at 3.3V.
UPRSM
3
RMWUPE
2
V
REF
CONFG
pin is then in a
1
FADDEN
0
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