MC68HC908AP64_07 FREESCALE [Freescale Semiconductor, Inc], MC68HC908AP64_07 Datasheet - Page 165
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MC68HC908AP64_07
Manufacturer Part Number
MC68HC908AP64_07
Description
Microcontrollers
Manufacturer
FREESCALE [Freescale Semiconductor, Inc]
Datasheet
1.MC68HC908AP64_07.pdf
(324 pages)
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The maximum percent difference between the receiver count and the transmitter count of a slow 9-bit
character with no errors is
Fast Data Tolerance
Figure 11-8
or a framing error. The fast stop bit ends at RT10 instead of RT16 but is still there for the stop bit data
samples at RT8, RT9, and RT10.
For an 8-bit character, data sampling of the stop bit takes the receiver
9 bit times × 16 RT cycles + 10 RT cycles = 154 RT cycles.
With the misaligned character shown in
the count of the transmitting device is
10 bit times × 16 RT cycles = 160 RT cycles.
The maximum percent difference between the receiver count and the transmitter count of a fast 8-bit
character with no errors is
For a 9-bit character, data sampling of the stop bit takes the receiver
10 bit times × 16 RT cycles + 10 RT cycles = 170 RT cycles.
With the misaligned character shown in
the count of the transmitting device is
11 bit times × 16 RT cycles = 176 RT cycles.
The maximum percent difference between the receiver count and the transmitter count of a fast 9-bit
character with no errors is
11.4.3.6 Receiver Wakeup
So that the MCU can ignore transmissions intended only for other receivers in multiple-receiver systems,
the receiver can be put into a standby state. Setting the receiver wakeup bit, RWU, in SCC2 puts the
receiver into a standby state during which receiver interrupts are disabled.
Freescale Semiconductor
shows how much a fast received character can be misaligned without causing a noise error
RECEIVER
RT CLOCK
MC68HC908AP Family Data Sheet, Rev. 4
Figure
Figure
170 176
------------------------- -
170 163
------------------------- -
154 160
------------------------- -
Figure 11-8. Fast Data
STOP
170
170
154
–
–
–
11-8, the receiver counts 154 RT cycles at the point when
11-8, the receiver counts 170 RT cycles at the point when
×
×
×
100
100
100
SAMPLES
=
=
=
DATA
3.53%
4.12%
3.90%
˙
IDLE OR NEXT CHARACTER
Functional Description
165
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