LPC47M140-NC SMSC [SMSC Corporation], LPC47M140-NC Datasheet - Page 182
LPC47M140-NC
Manufacturer Part Number
LPC47M140-NC
Description
128 PIN ENGANCED SUPER I/O CONTROLLER WITH AN LPC INTERFACE AND USB HUB
Manufacturer
SMSC [SMSC Corporation]
Datasheet
1.LPC47M140-NC.pdf
(205 pages)
- Current page: 182 of 205
- Download datasheet (2Mb)
Note 1: The PCI_RESET# width is dependent upon the processor clock. The PCI_RESET# must be active while
SMSC DS – LPC47M14X
CLOCKI
NAME
NAME
NAME
PCI RESET#
the clock is running and stable.
t1
t2
t1
t2
t1
t2
t3
t4
t5
t4
P C I_ C L K
Clock Cycle Time for 14.318MHZ
Clock High Time/Low Time for 14.318MHz
Clock Cycle Time for 32KHZ
Clock High Time/Low Time for 32KHz
Clock Rise Time/Fall Time (not shown)
Period
High Time
Low Time
Rise Time
PCI_RESET# width (Note 1)
Fall Time
DESCRIPTION
DESCRIPTION
DESCRIPTION
FIGURE 17 – INPUT CLOCK TIMING
FIGURE 18 – PCI CLOCK TIMING
FIGURE 19 – RESET TIMING
t5
t1
Page 182
t1
t4
t3
t2
MIN
MIN
20
30
12
12
MIN
t4
t2
69.84
31.25
16.53
TYP
TYP
35
TYP
t2
MAX
MAX
MAX
33.3
5
3
3
UNITS
UNITS
UNITS
nsec
nsec
nsec
nsec
nsec
µs
µs
µs
Rev. 03/19/2001
ns
ns
ns
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