LAN8187_06 SMSC [SMSC Corporation], LAN8187_06 Datasheet - Page 15

• Manufacturer Part Number: LAN8187_06
• Manufacturer: SMSC [SMSC Corporation]

Revision 1.0 (12-14-06)
a.On nRST transition high, the PHY latches the state of the configuration pins in this table.
SIGNAL NAME
SIGNAL NAME
CH_SELECT
GPO0/RMII
AMDIX_EN
REG_EN
MODE2
MODE1
MODE0
nRST
nINT
Table 3.4 Boot Strap Configuration Inputs
TYPE
TYPE
I/O
I/O
I
I
I
I
I
I
I
±15kV ESD Protected MII/RMII Fast-Ethernet PHY with HP Auto-MDIX and SMSC flexPWR
Table 3.5 General Signals
DATASHEET
PHY Operating Mode Bit 2: set the default MODE of the PHY.
See
the MODE options.
PHY Operating Mode Bit 1: set the default MODE of the PHY.
See
the MODE options.
PHY Operating Mode Bit 0: set the default MODE of the PHY.
See
the MODE options.
Regulator Enable: Internal +1.8V regulator enable:
VDDIO – Enables internal regulator.
VSS– Disables internal regulator.
HP Auto-MDIX Enable: This pin is used to manualy disable the
HP Auto-MDIX function. This can be bypassed using the internal
register 27 bit 15. Please see
page 30
(VDDIO or Floating) – Enables HP Auto-MDIX.
VSS – Disables HP Auto-MDIX
Channel Select: This pin is used in conjunction with the
AMDIX_EN pin above to manualy select the channel to transmit
and receive on. For more information please see
“Auto-MDIX Control,” on page 30
(VDDIO or Floating) – MDIX - TX pair receives RX pair transmits.
0V – MDI -TX pair transmits RX pair receives.
General Purpose Output 0 – General Purpose Output signal.
Driven by bits in registers 27 and 31.
RMII – MII/RMII mode selection is latched on the rising edge of
the internal reset (nreset) based on the following strapping:
Float the GPO0 pin for MII mode or pull-high with an external
Pull-up resistor (see
Resistors,” on page
mode.
Note:
LAN Interrupt – Active Low output. Place a pull-up external
resistor (see
on page
Notes:
External Reset – input of the system reset. This signal is active
LOW.
This signal is mux’d with TX_ER/TXD4
See
page 31
Section 5.4.9.2, "Mode Bus – MODE[2:0]," on page
Section 5.4.9.2, "Mode Bus – MODE[2:0]," on page
Section 5.4.9.2, "Mode Bus – MODE[2:0]," on page
Section 4.10, "(TX_ER/TXD4)/nINT Strapping," on
15
for more information.
32) to VCC 3.3V.
See
page 26
for additional details on Strapping options.
Table 4.4, “Boot Strapping Configuration Resistors,”
Section 4.6.3, "MII vs. RMII Configuration," on
for more details.
32) to VDDIO to set the device in RMII
Table 4.4, “Boot Strapping Configuration
DESCRIPTION
DESCRIPTION
a
Table 4.3, “Auto-MDIX Control,” on
SMSC LAN8187/LAN8187I
Table 4.3,
53, for
53, for
53, for
Datasheet
TM