AT83C26_07 ATMEL [ATMEL Corporation], AT83C26_07 Datasheet - Page 14

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AT83C26_07

Manufacturer Part Number
AT83C26_07
Description
Multiple Smart Card Reader Interface With Power Management
Manufacturer
ATMEL [ATMEL Corporation]
Datasheet
CRST controller
CRSTn for SCn interface (n=1, 2)
14
AT83C26
The CRSTn output pin is driven by the CARDRSTn bit value or by A1/RST pin.
Three modes are available:
Figure 4. Clock Block Diagram with Software Activation
Figure 5. CRSTn Block Diagram
If the ARTn bit is reset, CRSTn pin is driven by CARDRSTn bit.
If the ARTn bit is set, CRSTn pin is controlled and follows the “Automatic Reset Transition”
(see Activation sequence page 25).
A transparent mode with A1/RST pin.
A1/RST
A2/CK
CLK
CARDRSTn bit
Internal
oscillators
CARDRSTn bit
CKSn[2:0]
DCK[2:0]
tb delay
ARTn bit
CARDCKn bit
1
0
DC/DCA
and B
CKSTOPn bit
CRST_SELn bit
1
1
0
0
CRSTn
DCCLK
CCLKn
7511D–SCR–02/07

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