KM684002-17 SAMSUNG [Samsung semiconductor], KM684002-17 Datasheet - Page 8

• Manufacturer Part Number: KM684002-17
• Description: 512Kx8 Bit High Speed Static RAM(5V Operating), Revolutionary Pin out. Operated at Commercial, Extended and Industrial Temperature Range.
• Manufacturer: SAMSUNG [Samsung semiconductor]

NOTES(WRITE CYCLE)
1. All write cycle timing is referenced from the last valid address to the first transition address.
2. A write occurs during the overlap of a low CS and WE. A write begins at the latest transition CS going low and WE going low ; A write ends at the ear-
3. t
4. t
5. t
6. If OE, CS and WE are in the Read Mode during this period, the I/O pins are in the output low-Z state. Inputs of opposite phase of the output mus t not
7. For common I/O applications, minimization or elimination of bus contention conditions is necessary during read and write cycl e.
8. If CS goes low simultaneously with WE going or after WE going low, the outputs remain high impedance state.
9. Dout is the read data of the new address.
10. When CS is low : I/O pins are in the output state. The input signals in the opposite phase leading to the output should not be applied.
KM684002, KM684002E, KM684002I
FUNCTIONAL DESCRIPTION
* NOTE : X means Don't Care.
liest transition CS going high or WE going high. t
be applied because bus contention can occur.
CW
AS
WR
is measured from the address valid to the beginning of write.
is measured from the later of CS going low to end of write.
is measured from the end of write to the address change. t
CS
H
L
L
L
WE
X
H
H
L
OE
X*
H
L
X
WP
is measured from the beginning of write to the end of write.
Output Disable
Not Select
WR
Mode
Read
Write
applied in case a write ends as CS or WE going high.
- 8 -
I/O Pin
High-Z
High-Z
D
D
OUT
IN
PRELIMINARY
CMOS SRAM
Supply Current
I
SB
I
I
I
, I
CC
CC
CC
SB1
June -1997
Rev 3.0