MC68HC05P9ACDW FREESCALE [Freescale Semiconductor, Inc], MC68HC05P9ACDW Datasheet - Page 120

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MC68HC05P9ACDW

Manufacturer Part Number
MC68HC05P9ACDW
Description
HCMOS Microcontroller Unit
Manufacturer
FREESCALE [Freescale Semiconductor, Inc]
Datasheet
ADC
PC6/AN0–
PC3/AN3
Interrupts
120
NOTE:
The multiplexer can select one of four external analog input channels
(AN0, AN1, AN2, or AN3) for sampling. The conversion takes 32 cycles.
The first 12 cycles sample the voltage on the selected input pin by
charging an internal capacitor. In the last 20 cycles, a comparator
successively compares the output of an internal D/A converter to the
sampled analog input. Control logic changes the D/A converter input one
bit at a time, starting with the MSB, until the D/A converter output
matches the sampled analog input. The conversion is monotonic and
has no missing codes. At the end of the conversion, the conversion
complete flag (CCF) becomes set, and the CPU takes two cycles to
move the result to the ADC data register.
To prevent excess power dissipation, do not simultaneously use an I/O
port pin as a digital input and an analog input.
While the ADC is on, the selected analog input reads as logic 0. The port
C pins that are not selected read normally.
An analog input voltage equal to V
voltage greater than V
input voltage less than V
conversion, the source of each analog input should use V
supply voltage and be referenced to V
The clock frequency must be equal to or greater than 1 MHz. If the
internal clock frequency is less than 1MHz, the internal RC oscillator
(nominally 1.5 MHz) must be used for the ADC conversion clock. Make
this selection by setting the ADRC bit to logic 1 in the ADC status and
control register.
The ADC cannot generate interrupt requests.
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
ADC
RH
SS
converts to $FF with no overflow. An analog
converts to digital $00. For ratiometric
RH
converts to digital $FF; an input
SS
.
RH
as the
8-mc68hc05p9a
MOTOROLA

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