MC68HC05K1 FREESCALE [Freescale Semiconductor, Inc], MC68HC05K1 Datasheet - Page 72

• Manufacturer Part Number: MC68HC05K1
• Description: HCMOS Microcontroller Unit
• Manufacturer: FREESCALE [Freescale Semiconductor, Inc]

Technical Data
7.4.2 Data Direction Register B
Technical Data
NOTE:
Address:
The contents of data direction register B (DDRB) determine whether
each port B pin is an input or an output (see
to a DDRB bit enables the output buffer for the associated port B pin; a
logic 0 disables the output buffer. A reset initializes all DDRB bits to
logic 0, configuring all port B pins as inputs. Setting a DDRB bit to a
logic 1 turns off the pulldown device for that pin.
DDRB1 and DDRB0 — Data Direction Bits 1 and 0
Bit 7–2 — Not used
Avoid glitches on port B pins by writing to the port B data register before
changing DDRB bits from logic 0 to logic 1.
Reset:
Read:
Write:
These read/write bits control port B data direction.
Bits 7–2 always read as logic 0s. Writes to these bits have no effect.
Freescale Semiconductor, Inc.
For More Information On This Product,
1 = Corresponding port B pin configured as output
0 = Corresponding port B pin configured as input
$0005
Bit 7
0
0
Figure 7-6. Data Direction Register B (DDRB)
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Parallel Input/Output (I/O)
= Unimplemented
6
0
0
5
0
0
4
0
0
MC68HC05K0 • MC68HC05K1 — Rev. 2.0
3
0
0
Figure
7-6). Writing a logic 1
2
0
0
DDRB1
1
0
DDRB0
Bit 0
0