MPC870 FREESCALE [Freescale Semiconductor, Inc], MPC870 Datasheet - Page 27

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MPC870

Manufacturer Part Number
MPC870
Description
Hardware Specifications
Manufacturer
FREESCALE [Freescale Semiconductor, Inc]
Datasheet

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Bus Signal Timing
Figure 10
RAM words. (This is only the case where data is latched on the falling edge of CLKOUT.)
Figure 11
27
Figure 10. Input Data Timing when Controlled by UPM in the Memory Controller and DLT3 = 1
CLKOUT
CLKOUT
through
provides the timing for the input data controlled by the UPM for data beats where DLT3 = 1 in the UPM
WE[0:3]
D[0:31]
D[0:31]
A[0:31]
CSx
OE
TS
TA
Figure 14
Figure 11. External Bus Read Timing (GPCM Controlled—ACS = 00)
provide the timing for the external bus read controlled by various GPCM factors.
PRELIMINARY—SUBJECT TO CHANGE WITHOUT NOTICE
MPC875/MPC870 Hardware Specifications, Rev. 3.0
B11
B22
B8
B28
B20
B21
B12
B25
B18
B23
B26
B19
Freescale Semiconductor

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