MPC8533E_10 FREESCALE [Freescale Semiconductor, Inc], MPC8533E_10 Datasheet - Page 28

• Manufacturer Part Number: MPC8533E_10
• Description: Integrated Processor Hardware Specifications
• Manufacturer: FREESCALE [Freescale Semiconductor, Inc]

Enhanced Three-Speed Ethernet (eTSEC), MII Management
Figure 10
Figure 11
8.4
This section describes the MII transmit and receive AC timing specifications.
28
At recommended operating conditions with L/TVDD of 3.3 V ± 5% or 2.5 V ± 5%
RX_CLK clock fall time (80%–20%)
Note:
1. The symbols used for timing specifications follow the pattern of t
inputs and t
timing (GR) with respect to the time data input signals (D) reaching the valid state (V) relative to the t
going to the high state (H) or setup time. Also, t
input signals (D) went invalid (X) relative to the t
general, the clock reference symbol representation is based on three letters representing the clock of a particular functional.
For example, the subscript of t
is used with the appropriate letter: R (rise) or F (fall).
MII AC Timing Specifications
provides the AC test load for eTSEC.
shows the GMII receive AC timing diagram.
(first two letters of functional block)(reference)(state)(signal)(state)
Parameter/Condition
RXD[7:0]
RX_CLK
MPC8533E PowerQUICC III Integrated Processor Hardware Specifications, Rev. 4
RX_DV
RX_ER
Table 26. GMII Receive AC Timing Specifications (continued)
Output
GRX
Figure 11. GMII Receive AC Timing Diagram
represents the GMII (G) receive (RX) clock. For rise and fall times, the latter convention
t
t
GRXH
GRDVKH
Figure 10. eTSEC AC Test Load
t
GRX
Z
GRDXKL
GRX
0
= 50 Ω
clock reference (K) going to the low (L) state or hold time. Note that, in
symbolizes GMII receive timing (GR) with respect to the time data
Symbol
t
GRXF
t
GRXF
(first two letters of functional block)(signal)(state)(reference)(state)
for outputs. For example, t
1
t
GRDXKH
Min
R
—
L
t
GRXR
= 50 Ω
Typ
—
LV
GRDVKH
DD
/2
Max
1.0
symbolizes GMII receive
Freescale Semiconductor
RX
clock reference (K)
Unit
ns
Notes
for