PIC12C672 MICROCHIP [Microchip Technology], PIC12C672 Datasheet - Page 24

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PIC12C672

Manufacturer Part Number
PIC12C672
Description
8-Pin, 8-Bit CMOS Microcontroller with EEPROM Data Memory
Manufacturer
MICROCHIP [Microchip Technology]
Datasheet

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PIC12CE5XX
6.5
Read operations are initiated in the same way as write
operations with the exception that the R/W bit of the
slave address is set to one. There are three basic types
of read operations: current address read, random read,
and sequential read.
6.5.1
It contains an address counter that maintains the
address of the last word accessed, internally incre-
mented by one. Therefore, if the previous read access
was to address n, the next current address read oper-
ation would access data from address n + 1. Upon
receipt of the slave address with the R/W bit set to one,
the device issues an acknowledge and transmits the
eight bit data word. The master will not acknowledge
the transfer but does generate a stop condition and the
device discontinues transmission (Figure 6-6).
6.5.2
Random read operations allow the master to access
any memory location in a random manner. To perform
this type of read operation, first the word address must
be set. This is done by sending the word address to the
FIGURE 6-6:
FIGURE 6-7:
FIGURE 6-8:
DS40172A-page 24
BUS ACTIVITY
MASTER
SDA LINE
BUS ACTIVITY
READ OPERATIONs
CURRENT ADDRESS READ
RANDOM READ
X = Don’t Care Bit
BUS ACTIVITY
MASTER
SDA LINE
BUS ACTIVITY
CURRENT ADDRESS READ
RANDOM READ
SEQUENTIAL READ
CONTROL
BYTE
S
T
A
R
T
S 1
A
C
K
0
CONTROL
BUS ACTIVITY
MASTER
SDA LINE
BUS ACTIVITY
1
X = Don’t Care Bit
BYTE
0 X X X 0
DATA n
A
C
K
X X X X
A
C
K
ADDRESS (n)
Preliminary
S
T
A
R
T
S
WORD
DATA n + 1
1
0
CONTROL
1
BYTE
0 X X X 1
pointer allows the entire memory contents to be serially
read during one operation.
device as part of a write operation. After the word
address is sent, the master generates a start condition
following the acknowledge. This terminates the write
operation, but not before the internal address pointer is
set. Then the master issues the control byte again but
with the R/W bit set to a one. It will then issue an
acknowledge and transmits the eight bit data word. The
master will not acknowledge the transfer but does gen-
erate a stop condition and the device discontinues
transmission (Figure 6-7). After this command, the
internal address counter will point to the address loca-
tion following the one that was just read.
6.5.3
Sequential reads are initiated in the same way as a ran-
dom read except that after the device transmits the first
data byte, the master issues an acknowledge as
opposed to a stop condition in a random read. This
directs the device to transmit the next sequentially
addressed 8-bit word (Figure 6-8).
To provide sequential reads, it contains an internal
address pointer which is incremented by one at the
completion of each read operation. This address
A
C
K
S
T
A
R
T
S 1
A
C
K
A
C
K
0
CONTROL
DATA n + 2
1
SEQUENTIAL READ
BYTE
0 X X X 1
DATA
A
C
K
A
C
K
O
N
A
C
K
S
T
O
P
P
DATA (n)
1997 Microchip Technology Inc.
DATA n + X
N
O
A
C
K
S
T
O
P
P
N
O
C
A
K
S
T
O
P
P

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