ML67Q4002 OKI [OKI electronic componets], ML67Q4002 Datasheet - Page 11
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ML67Q4002
Manufacturer Part Number
ML67Q4002
Description
32-bit ARM-Based General-Purpose Microcontroller
Manufacturer
OKI [OKI electronic componets]
Datasheet
1.ML67Q4002.pdf
(24 pages)
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ML67Q4002-1NNNTC0AAL
Manufacturer:
ROHM
Quantity:
2 001
External Bus
XA[23:19]
XA[18:0]
XD[15:0]
External bus control signals (ROM/SRAM/IO)
XROMCS_N
XRAMCS_N
XIOCS_N[0]
XIOCS_N[1]
XIOCS_N[2]
XIOCS_N[3]
XOE_N
XWE_N
XBS_N[1:0]
XBWE_N[0]
XBWE_N[1]
XWR
XWAIT
External bus control signals (DRAM)
XRAS_N
XCAS_N
XSDCLK
XSDCKE
XSDCS_N
XDQM[1]/XCAS_N[1]
XDQM[0]/XCAS_N[0]
OKI Semiconductor
Pin Name
I/O
I/O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
I
Address bus to external RAM, external ROM, external I/O banks, and
external DRAM. After a reset, these pins are configured for their primary
function (PIOC[6:2]).
Address bus to external RAM, external ROM, external I/O banks, and
external DRAM.
Data bus to external RAM, external ROM, external I/O banks, and external
DRAM.
ROM bank chip select
SRAM bank chip select
IO chip select 0
IO chip select 1
IO chip select 2
IO chip select 3
Output enable/ Read enable
Write enable
Byte select: XBS_N[1] is for MSB, XBS_N[0] is for LSB
LSB Write enable
MSB Write enable
Data transfer direction for external bus, used when connecting to Motorola
I/O devices. This represent the secondary function of pin PIOC[7].
L: read , H: write. Available for I/O bank 0/1.
External I/O bank 0/1, 2/3 WAIT signal.
This input permits access to devices slower than register settings.
Row address strobe. Used for both EDO DRAM and SDRAM
Column address strobe signal (SDRAM)
SDRAM clock (same frequency as internal HCLK)
Clock enable (SDRAM)
Chip select (SDRAM)
Connected to SDRAM: DQM (MSB)
Connected to EDO DRAM: column address strobe signal (MSB)
Connected to SDRAM: DQM (LSB)
Connected to EDO DRAM: column address strobe signal (LSB)
Description
ML674001/67Q4002/67Q4003
Secondary
Secondary
Secondary
Secondary
Secondary
Secondary
Secondary
Secondary
Secondary
Secondary
Secondary
Primary /
FEDL674001-01
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Negative
Negative
Negative
Negative
Negative
Negative
Negative
Negative
Negative
Negative
Negative
Negative
Negative
Negative
Negative
Negative
Positive/
Positive/
Positive
Positive
Positive
Positive
Logic
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