CY8C201A0_12 CYPRESS [Cypress Semiconductor], CY8C201A0_12 Datasheet - Page 4
CY8C201A0_12
Manufacturer Part Number
CY8C201A0_12
Description
Manufacturer
CYPRESS [Cypress Semiconductor]
Datasheet
1.CY8C201A0_12.pdf
(38 pages)
- Current page: 4 of 38
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Pinouts
Pin Definitions
16-pin SOIC – 5/10 Segment Slider
Document Number: 001-54607 Rev. *G
Note
3. Avoid using GP1[1] and GP1[2] for driving LEDs. These two pins have special functions during power-up which is used at factory. LEDs connected to these two pins
Pin No.
blink during the device power-up.
10
12
13
14
15
16
11
1
2
3
4
5
6
7
8
9
GP1[1]
GP1[2]
I
I
GP0[3]
GP0[4]
GP0[0]
GP0[1]
2
2
GP1[0]
GP1[3]
GP1[4]
GP0[2]
Name
XRES
CSint
C SDA
C SCL
V
V
DD
SS
[3]
[3]
Configurable as CapSense or GPIO
Integrating Capacitor Input. The external capacitance is required only if 5:1 SNR cannot be achieved.
Typical range is 1 nF to 4.7 nF.
Configurable as CapSense or GPIO
Configurable as CapSense or GPIO
Configurable as CapSense or GPIO
I
I
Configurable as CapSense or GPIO
Configurable as CapSense or GPIO
Ground Connection
Configurable as V
Configurable as CapSense or GPIO
Configurable as CapSense or GPIO
Active high external reset with internal pull-down
Configurable as CapSense or GPIO
Supply voltage
2
2
C Clock
C Data
Figure 2. 16-pin SOIC (150 Mils) pinout – 5/10 Segment Slider
SS
CapSense or GPIO
Description
CY8C201A0
Page 4 of 38
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