MK61FX512VMD12 FREESCALE [Freescale Semiconductor, Inc], MK61FX512VMD12 Datasheet - Page 65

• Manufacturer Part Number: MK61FX512VMD12
• Description: K61 Sub-Family
• Manufacturer: FREESCALE [Freescale Semiconductor, Inc]

6.8.5 ULPI timing specifications
The ULPI interface is fully compliant with the industry standard UTMI+ Low Pin
Interface. Control and data timing requirements for the ULPI pins are given in the
following table. These timings apply to synchronous mode only. All timings are
measured with respect to the clock as seen at the USB_CLKIN pin.
Freescale Semiconductor, Inc.
Num
U1
U2
U3
U4
U5
USB_CLKIN
ULPI_DIR/ULPI_NXT
(control input)
ULPI_DATAn (input)
ULPI_STP
(control output)
ULPI_DATAn (output)
Output hold (control
Input setup (control
USB_CLKIN clock
Input hold (control
USB_CLKIN duty
(control and data)
USB_CLKIN
Description
Output valid
frequency
operating
and data)
and data)
and data)
period
cycle
K61 Sub-Family Data Sheet, Rev. 4, 10/2012.
Table 43. ULPI timing specifications
Figure 28. ULPI timing diagram
U2
Min.
—
—
—
—
5
1
1
U3
U4
16.67
Typ.
60
50
—
—
—
—
Peripheral operating requirements and behaviors
U1
U5
Max.
9.5
—
—
—
—
—
—
MHz
Unit
ns
ns
ns
ns
ns
%
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