XA3S1200E XILINX [Xilinx, Inc], XA3S1200E Datasheet - Page 35

• Manufacturer Part Number: XA3S1200E
• Description: XA Spartan-3E Automotive FPGA Family Data Sheet
• Manufacturer: XILINX [Xilinx, Inc]

IEEE 1149.1/1553 JTAG Test Access Port Timing
Table 44: Timing for the JTAG Test Access Port
DS635 (v2.0) September 9, 2009
Product Specification
Notes:
1.
Clock-to-Output Times
T
Setup Times
T
T
Hold Times
T
T
Clock Timing
T
T
F
TCKTDO
TDITCK
TMSTCK
TCKTDI
TCKTMS
CCH
CCL
TCK
The numbers in this table are based on the operating conditions set forth in
Symbol
R
The time from the falling transition on the TCK pin
to data appearing at the TDO pin
The time from the setup of data at the TDI pin to
the rising transition at the TCK pin
The time from the setup of a logic level at the TMS
pin to the rising transition at the TCK pin
The time from the rising transition at the TCK pin
to the point when data is last held at the TDI pin
The time from the rising transition at the TCK pin
to the point when a logic level is last held at the
TMS pin
The High pulse width at the TCK pin
The Low pulse width at the TCK pin
Frequency of the TCK signal
Description
www.xilinx.com
Table
6.
Min
1.0
7.0
7.0
0
0
5
5
-
-4 Speed Grade
Max
11.0
25
-
-
-
-
-
-
Units
MHz
ns
ns
ns
ns
ns
ns
ns
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