XC3S100E-4CP132C XILINX [Xilinx, Inc], XC3S100E-4CP132C Datasheet - Page 44

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XC3S100E-4CP132C

Manufacturer Part Number
XC3S100E-4CP132C
Description
Spartan-3E FPGA Family
Manufacturer
XILINX [Xilinx, Inc]
Datasheet

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The BCIN and BCOUT ports have associated dedicated
routing that connects adjacent multipliers within the same
column. Via the cascade connection, the BCOUT port of
one multiplier block drives the BCIN port of the multiplier
block directly above it. There is no connection to the BCIN
port of the bottom-most multiplier block in a column or a
connection from the BCOUT port of the top-most block in a
column. As an example,
cade capability within the XC3S100E FPGA, which has a
single column of multiplier, four blocks tall. For clarity, the
figure omits the register control inputs.
DS312-2 (v1.1) March 21, 2005
Advance Product Specification
R
Figure 36
shows the multiplier cas-
www.xilinx.com
When using the BREG register, the cascade connection
forms a shift register structure typically used in DSP algo-
rithms such as direct-form FIR filters. When the BREG reg-
ister is omitted, the cascade structure essentially feeds the
same input value to more than one multiplier. This parallel
connection serves to create wide-input multipliers, imple-
ment transpose FIR filters, and is used in any application
that requires that several multipliers have the same input
value.
Figure 36: Multiplier Cascade Connection
B_INPUT = CASCADE
B_INPUT = CASCADE
B_INPUT = CASCADE
B_INPUT = DIRECT
A
B
A
B
A
B
A
B
BCOUT
BCOUT
BCOUT
BCOUT
Functional Description
BCIN
BCIN
BCIN
BCIN
DS312-2_30_021505
P
P
P
P
37

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