XC3S100E-4CP132C XILINX [Xilinx, Inc], XC3S100E-4CP132C Datasheet - Page 112
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XC3S100E-4CP132C
Manufacturer Part Number
XC3S100E-4CP132C
Description
Spartan-3E FPGA Family
Manufacturer
XILINX [Xilinx, Inc]
Datasheet
1.XC3S100E-4CP132C.pdf
(193 pages)
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Table 10: DC Characteristics of User I/Os Using Differential Signal Standards
DS312-3 (v1.0) March 1, 2005
Advance Product Specification
Notes:
1.
2.
3.
LVDS_25
BLVDS_25
MINI_LVDS_25
RSDS_25
IOSTANDARD
Attribute
The numbers in this table are based on the conditions set forth in
Output voltage measurements for all differential standards are made with a termination resistor (R
differential signal pair.
At any given time, no more than two differential standards may be assigned to each bank.
R
(mV)
Min
250
250
300
100
Internal
GND level
Logic
(mV)
V
Typ
V
V
350
350
OD
OUTN
-
-
OUTP
V
(mV)
Max
400
450
450
600
OCM
V
V
V
OD
OH
OL
Figure 2: Differential Output Voltages
50%
= Output common mode voltage =
= Output differential voltage =
= Output voltage indicating a Low logic level
= Output voltage indicating a High logic level
(mV)
Min
-
-
-
-
V
∆V
OCM
OD
www.xilinx.com
(mV)
Max
50
-
-
-
Table 4
V
1.125
Min
1.0
1.1
V
(V)
OUTP
V
-
OD
OUTN
and
Table
V
Typ (V) Max (V)
V
V
OUTP
1.20
OCM
OH
N
P
-
-
-
V
9.
OUTP
- V
OUTN
Differential
I/O Pair Pins
1.375
2
+ V
1.4
1.4
-
V
OUTN
OL
DC and Switching Characteristics
DS312-3_03_021505
T
) of 100Ω across the N and P pins of the
(mV)
Min
-
-
-
-
∆V
OCM
(mV)
Max
50
-
-
-
1.25
1.15
1.15
V
Min
(V)
OH
-
Max
1.25
1.25
1.35
V
(V)
OL
-
9
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