XCS05-3BG256C XILINX [Xilinx, Inc], XCS05-3BG256C Datasheet - Page 49

• Manufacturer Part Number: XCS05-3BG256C
• Description: Spartan and Spartan-XL FPGA
• Manufacturer: XILINX [Xilinx, Inc]

Spartan Family Pin-to-Pin Input Parameter Guidelines
All devices are 100% functionally tested. Pin-to-pin timing
parameters are derived from measuring external and inter-
nal test patterns and are guaranteed over worst-case oper-
Spartan Family Primary and Secondary Setup and Hold
DS060 (v1.8) June 26, 2008
Product Specification
Notes:
1.
2.
Input Setup/Hold Times Using Primary Clock and IFF
Input Setup/Hold Times Using Secondary Clock and IFF
T
T
T
T
PSUF
SSUF
Symbol
Setup time is measured with the fastest route and the lightest load. Hold time is measured using the furthest distance and a
reference load of one clock pin per IOB/CLB.
IFF = Input Flip-flop or Latch
PSU
SSU
/T
/T
/T
/T
PHF
PH
SHF
SH
R
No Delay
With Delay
No Delay
With Delay
Description
www.xilinx.com
ating conditions (supply voltage and junction temperature).
Listed below are representative values for typical pin loca-
tions and normal clock loading.
Spartan and Spartan-XL FPGA Families Data Sheet
Device
XCS05
XCS10
XCS20
XCS30
XCS40
XCS05
XCS10
XCS20
XCS30
XCS40
XCS05
XCS10
XCS20
XCS30
XCS40
XCS05
XCS10
XCS20
XCS30
XCS40
1.2 / 1.7
1.0 / 2.3
0.8 / 2.7
0.6 / 3.0
0.4 / 3.5
4.3 / 0.0
4.3 / 0.0
4.3 / 0.0
4.3 / 0.0
5.3 / 0.0
0.9 / 2.2
0.7 / 2.8
0.5 / 3.2
0.3 / 3.5
0.1 / 4.0
4.0 / 0.0
4.0 / 0.0
4.0 / 0.5
4.0 / 0.5
5.0 / 0.0
Min
-4
Speed Grade
1.8 / 2.5
1.5 / 3.4
1.2 / 4.0
0.9 / 4.5
0.6 / 5.2
6.0 / 0.0
6.0 / 0.0
6.0 / 0.0
6.0 / 0.0
6.8 / 0.0
1.5 / 3.0
1.2 / 3.9
0.9 / 4.5
0.6 / 5.0
0.3 / 5.7
5.7 / 0.0
5.7 / 0.0
5.7 / 0.5
5.7 / 0.5
6.5 / 0.0
Min
-3
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
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