XC3S1000-4CP132C XILINX [Xilinx, Inc], XC3S1000-4CP132C Datasheet - Page 92

• Manufacturer Part Number: XC3S1000-4CP132C
• Description: Spartan-3 FPGA Family: Complete Data Sheet
• Manufacturer: XILINX [Xilinx, Inc]

Spartan-3 FPGA Family: Pinout Descriptions
Table 2: Spartan-3 Pin Definitions (Continued)
Detailed, Functional Pin Descriptions
I/O Type: Unrestricted, General-purpose I/O
Pins
After configuration, I/O-type pins are inputs, outputs, bidi-
rectional I/O, three-state outputs, open-drain outputs, or
open-source outputs, as defined in the application
Pins labeled "IO" support all SelectIO™ signal standards
except differential standards. A given device at most only
has a few of these pins.
A majority of the general-purpose I/O pins are labeled in the
format “IO_Lxxy_#”. These pins support all SelectIO signal
standards, including the differential standards such as
LVDS, ULVDS, BLVDS, RSDS, or LDT.
For additional information, see the "IOBs" section in Module
2:
Differential Pair Labeling
A pin supports differential standards if the pin is labeled in
the format “Lxxy_#”. The pin name suffix has the following
significance.
a differential input to and a differential output from Bank 2.
6
Notes:
1.
2.
GND: Ground supply pins
GND
N.C.: Unconnected package pins
N.C.
Functional
All unused inputs and bidirectional pins must be tied either High or Low. For unused enable inputs, apply the level that disables the
associated function. One common approach is to activate internal pull-up or pull-down resistors. An alternative approach is to
externally connect the pin to either VCCO or GND.
All outputs are of the totem-pole type — i.e., they can drive High as well as Low logic levels — except for the cases where “Open
Drain” is indicated. The latter can only drive a Low logic level and require a pull-up resistor to produce a High logic level.
Pin Name
Figure 1
Description.
Bank 5
Bank 0
provides a specific example showing
Supply
Bank 4
Bank 1
Direction
Figure 1: Differential Pair Labelling
www.xilinx.com
Ground:
Ground pins, which are connected to the power supply’s return
path. All pins must be connected.
Unconnected Package Pin:
These package pins are unconnected.
•
•
•
•
If unused, these pins are in a high impedance state. The Bit-
stream generator option UnusedPin enables a weak pull-up
or pull-down resistor on all unused I/O pins.
Behavior from Power-On through End of Configu-
ration
During the configuration process, all pins that are not
actively involved in the configuration process are in a
high-impedance state. The HSWAP_EN input determines
whether or not weak pull-up resistors are enabled during
configuration. HSWAP_EN = 0 enables the weak pull-up
resistors. HSWAP_EN = 1 disables the pull-up resistors
allowing the pins to float, which is the desired state for
hot-swap applications.
‘L’ indicates differential capability.
"xx" is a two-digit integer, unique for each bank, that
identifies a differential pin-pair.
‘y’ is replaced by ‘P’ for the true signal or ‘N’ for the
inverted. These two pins form one differential pin-pair.
‘#’ is an integer, 0 through 7, indicating the associated
I/O bank.
IO_L38P_2
IO_L38N_2
IO_L39P_2
IO_L39N_2
Description
Negative Polarity,
Inverted Driver
Positive Polarity,
Pair Number
True Driver
DS099-4_01_042303
Bank Number
DS099-4 (v1.6) January 17, 2005
Product Specification
R