DSP56100 MOTOROLA [Motorola, Inc], DSP56100 Datasheet - Page 46

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DSP56100

Manufacturer Part Number
DSP56100
Description
16-bit General Purpose Digital Signal Processor
Manufacturer
MOTOROLA [Motorola, Inc]
Datasheet
MOTOROLA
NOTES:
1. “Host synchronization delay (tHSDL)” is the time period required for the DSP56166 to
sample any external asynchronous input signal, determine whether it is high or low, and
synchronize it to the internal clock.
2. See HOST PORT USAGE CONSIDERATIONS.
3. HREQ is pulled up by 1k .
4. Only if two consecutive reads from one of these registers are executed.
AC Electrical Characteristics — Host I/O Timing (Continued)
Num
110
111
112
113
114
115
116
117
118
119
120
HR/W Low Setup Time Before HEN Asser-
tion
HR/W Low Hold Time After HEN Deasser-
tion
HR/W High Setup Time to HEN Assertion
HR/W High Hold Time After HEN/HACK
Deassertion
HA0-HA2 Setup Time Before HEN Asser-
tion
HA0-HA2 Hold Time After HEN Deassertion
DMA HACK Assertion to HREQ Deasser-
tion(see Note 3)
DMA HACK Deassertion to HREQ
Assertion(see Note 3)
Delay from HEN Deassertion to HREQ
Assertion for RXL Read (see Note 3)
Delay from HEN Deassertion to HREQ
Assertion for TXL Write (see Note 3)
Delay from HEN Assertion to HREQ Deas-
sertion for RXL Read, TXL Write
( see Note 3)
DSP56166 Technical Data Sheet
Characteristic
PRELIMINARY - 6/15/93
for DMA RXL Read
for DMA TXL Write
for All Other Cases
+3T+4
+2T+4
+3T+4
+2T+4
t
t
t
t
13.7
HSDL
HSDL
HSDL
HSDL
Min
4
4
4
3
0
6
4
4
60MHz
Max
16.4
2T+
2T+
35
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
36

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