ADSP-2109 AD [Analog Devices], ADSP-2109 Datasheet - Page 30

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ADSP-2109

Manufacturer Part Number
ADSP-2109
Description
Low Cost DSP Microcomputers
Manufacturer
AD [Analog Devices]
Datasheet

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ADSP-2104/ADSP-2109
TIMING PARAMETERS (ADSP-2104L/ADSP-2109L)
BUS REQUEST/GRANT
Parameter
Timing Requirement:
t
t
Switching Characteristic:
t
t
t
t
NOTES
1
Note: BG is asserted in the cycle after BR is recognized. No external synchronization circuit is needed when BR is generated as an asynchronous signal.
requires a pulse width greater than 10 ns.
If BR meets the t
BH
BS
SD
SDB
SE
SEC
BR Hold after CLKOUT High
BR Setup before CLKOUT Low
CLKOUT High to DMS, PMS, BMS, RD, WR Disable
DMS, PMS, BMS, RD, WR Disable to BG Low
BG High to DMS, PMS, BMS, RD, WR Enable
DMS, PMS, BMS, RD, WR Enable to CLKOUT High
BS
and t
BH
setup/hold requirements, it will be recognized in the current processor cycle; otherwise it is recognized in the following cycle. BR
PMS, DMS
CLKOUT
CLKOUT
BMS, RD
WR
BG
BR
1
1
t
SD
t
BH
Figure 27. Bus Request/Grant
t
BS
t
SDB
–30–
Min
23.1
38.1
0
0
8.1
13.824 MHz
Max
38.1
t
SE
t
SEC
Min
0.25t
0.25t
0
0
0.25t
Dependency
Frequency
CK
CK
CK
+ 5
+ 20
– 10
Max
0.25t
CK
+ 20
REV. 0
Unit
ns
ns
ns
ns
ns
ns

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