ATF22LV10CZ_10 ATMEL [ATMEL Corporation], ATF22LV10CZ_10 Datasheet - Page 8

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ATF22LV10CZ_10

Manufacturer Part Number
ATF22LV10CZ_10
Description
High-performance Electrically Erasable Programmable Logic Device
Manufacturer
ATMEL [ATMEL Corporation]
Datasheet
Figure 8-2.
I/O Diagram
V CC
OE
DA T A
I/O
V CC
INPUT
100K
9.
Functional Logic Diagram Description
®
The Functional Logic Diagram describes the Atmel
ATF22LV10CZ/CQZ architecture.
The ATF22LV10CZ/CQZ has 12 inputs and 10 I/O macrocells. Each macrocell can be configured into one of four
output configurations: active high/low or registered/combinatorial. The universal architecture of the
ATF22LV10CZ/CQZ can be programmed to emulate most 24-pin PAL devices.
Unused product terms are automatically disabled by the compiler to decrease power consumption. A security fuse,
when programmed, protects the contents of the ATF22LV10CZ/CQZ. Eight bytes (64-fuses) of User Signature are
accessible to the user for purposes such as storing project name, part number, revision or date. The User
Signature is accessible regardless of the state of the security fuse.
Atmel ATF22LV10C(Q)Z
8
0779M–PLD–7/10

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