ATF22LV10CZ_10 ATMEL [ATMEL Corporation], ATF22LV10CZ_10 Datasheet - Page 2
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ATF22LV10CZ_10
Manufacturer Part Number
ATF22LV10CZ_10
Description
High-performance Electrically Erasable Programmable Logic Device
Manufacturer
ATMEL [ATMEL Corporation]
Datasheet
1.ATF22LV10CZ_10.pdf
(19 pages)
2.
2
Figure 1-1.
Pin Configurations
Table 2-1.
Pin Name
CLK
IN
I/O
GND
VCC
Figure 2-1.
Note:
Figure 2-3.
Note:
Atmel ATF22LV10C(Q)Z
TSSOP is the smallest package of SPLD
offering
For PLCC, pins 1, 8, 15, and 22 can be
left unconnected. For superior perfor-
mance, connect VCC to pin 1 and GND
to pins 8, 15, and 22
CLK/IN
GND
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
GND*
Block Diagram
Pin Configurations (All Pinouts Top View)
IN
IN
IN
IN
IN
IN
TSSOP
PLCC
1
2
3
4
5
6
7
8
9
10
11
12
5
6
7
8
9
10
11
Function
Clock
Logic Inputs
Bi-directional Buffers
Ground
(3 to 5.5V) Supply
25
24
23
22
21
20
19
24
23
22
21
20
19
18
17
16
15
14
13
I/O
I/O
I/O
GND*
I/O
I/O
I/O
VCC
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
IN
Figure 2-2.
CLK/IN
GND
DIP/SOIC
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
1
2
3
4
5
6
7
8
9
10
11
12
24
23
22
21
20
19
18
17
16
15
14
13
VCC
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
IN
0779M–PLD–7/10