CY37032P CYPRESS [Cypress Semiconductor], CY37032P Datasheet
CY37032P
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CY37032P Summary of contents
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Features • In-System Reprogrammable™ (ISR™) CMOS CPLDs — JTAG interface for reconfigurability — Design changes do not cause pinout changes — Design changes do not cause timing changes • High density — 512 macrocells — 264 ...
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Selection Guide 5.0V Selection Guide General Information Device Macrocells CY37032 32 CY37064 64 CY37128 128 CY37192 192 CY37256 256 CY37384 384 CY37512 512 Speed Bins Device 200 167 CY37032 X CY37064 X CY37128 X CY37192 CY37256 CY37384 CY37512 Device-Package Offering ...
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Speed Bins Device 200 167 CY37032V CY37064V CY37128V CY37192V CY37256V CY37384V CY37512V Device-Package Offering and I/O Count Device CY37032V 37 37 CY37064V CY37128V CY37192V CY37256V CY37384V CY37512V Architecture Overview of Ultra37000 Family Programmable Interconnect Matrix The PIM ...
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FROM PIM PRODUCT TERM ARRAY TO PIM Figure 1. Logic Block with 50% Buried Macrocells Low-Power Option Each logic block can operate in high-speed mode for critical path performance low-power mode for power conser- ...
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The buried macrocell also supports input register capability. The buried macrocell can be configured to act as an input register (D-type or latch) whose input comes from the I/O pin associated with the neighboring macrocell. The output of all buried ...
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INPUT/CLOCK PIN D 0 FROM CLOCK 1 O POLARITY INPUT 2 CLOCK PINS FROM CLOCK 1 POLARITY MUXES 2 3 C10 Clockin g Each I/O and buried macrocell has access to four synchronous clocks ...
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COMBINATORIAL SIGNAL INPUT REGISTERED SIGNAL D,T,L O INPUT CLOCK Figure 5. Timing Model for CY37128 JTAG and PCI Standards PCI Compliance 5V operation of the Ultra37000 is fully ...
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The third programming option for Ultra37000 devices is to utilize the embedded controller or processor that already exists in the system. The Ultra37000 ISR software assists in this method by converting the device JEDEC maps into the ISR serial stream ...
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Logic Block Diagrams CY37032/CY37032V 16 I/Os −I/O I CY37064/CY37064V (100-Lead TQFP) 16 I/Os I/O -I I/Os I/O -I TDI JTAG Tap TCK TDO Controller TMS Document #: 38-03007 Rev. *D Clock/ Input Input ...
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Logic Block Diagrams (continued) CY37128/CY37128V (160-lead TQFP) 16 I/Os I/O –I I/Os I/O –I I/Os I/O –I I/Os I/O –I CY37192/CY37192V (160-lead TQFP) 10 I/Os I/O –I ...
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Logic Block Diagrams (continued) CY37256/CY37256V (256-lead BGA) 12 I/Os −I/O I I/Os −I/O I I/Os −I/O I I/Os −I/O I I/Os −I/O I I/Os −I/O ...
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Logic Block Diagrams (continued) CY37384/CY37384V (256-Lead BGA) 12 I/Os −I/O I I/Os −I/O I I/Os −I/O I I/Os −I/O I I/Os −I/O I I/Os −I/O ...
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Logic Block Diagrams (continued) CY37512/CY37512V (352-Lead BGA) 12 I/Os −I/O I I/Os −I/O I I/Os −I/O I I/Os −I/O I I/Os −I/O I I/Os −I/O ...
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Device Characteristics Maximum Ratings (Above which the useful life may be impaired. For user guide- lines, not tested.) Storage Temperature ................................. –65°C to +150°C Ambient Temperature with Power Applied............................................. –55°C to +125°C Supply Voltage to Ground Potential ............... –0.5V ...
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Inductance Parameter Description Test Conditions L Maximum Pin V = 5.0V IN Inductance MHz [5] Capacitance Parameter Description C Input/Output Capacitance I/O C Clock Signal Capacitance CLK C Dual-Function Pins DP [5] Endurance Characteristics Parameter ...
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Device Electrical Characteristics Parameter Description I Input Bus-Hold HIGH Overdrive Current V BHHO [5] Inductance Parameter Description Test Conditions L Maximum Pin V = 3.3V IN Inductance MHz [5] Capacitance Parameter Description C Input/Output Capacitance ...
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Parameter t 1.5V ER(–) t 2.6V ER(+) t 1.5V EA(+) t V EA(–) Switching Characteristics Over the Operating Range Parameter Combinatorial Mode Parameters [13, 14, 15] t Input to Combinatorial Output PD [13, 14, 15] t Input to Output ...
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Switching Characteristics Over the Operating Range (continued) Parameter Product Term Clocking Parameters [13, 14, 15] t Product Term Clock or Latch Enable (PTCLK) to Output COPT t Set-Up Time from Input to Product Term Clock or Latch Enable (PTCLK) SPT ...
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Switching Characteristics Over the Operating Range 200 MHz 167 MHz 154 MHz Parameter Combinatorial Mode Parameters [13, 14, 15 6.5 PD [13, 14, 15 12.5 PDL [13, 14, 15 13.5 PDLL [13, 14, 15] ...
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Switching Characteristics Over the Operating Range (continued) 200 MHz 167 MHz 154 MHz Parameter [13, 14, 15 [13 [13, 14, 15 User Option Parameters ...
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Switching Waveforms (continued) Registered Output with Product Term Clocking Input Going Through the Array INPUT PRODUCT TERM CLOCK REGISTERED OUTPUT Registered Output with Product Term Clocking Input Coming From Adjacent Buried Register INPUT PRODUCT TERM CLOCK REGISTERED OUTPUT Latched Output ...
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Switching Waveforms (continued) Registered Input REGISTERED INPUT INPUT REGISTER CLOCK COMBINATORIAL OUTPUT CLOCK Clock to Clock INPUT REGISTER CLOCK OUTPUT REGISTER CLOCK Latched Input LATCHED INPUT LATCH ENABLE COMBINATORIAL OUTPUT LATCH ENABLE Document #: 38-03007 Rev ...
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Switching Waveforms (continued) Latched Input and Output LATCHED INPUT LATCHED OUTPUT INPUT LATCH ENABLE OUTPUT LATCH ENABLE LATCH ENABLE Asynchronous Reset INPUT REGISTERED OUTPUT CLOCK Asynchronous Preset INPUT REGISTERED OUTPUT CLOCK Document #: 38-03007 Rev ICOL t ICS ...
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Switching Waveforms (continued) Output Enable/Disable INPUT OUTPUTS Power Consumption Typical 5.0V Power Consumption CY37032 The typical pattern is a 16-bit up counter, per logic ...
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Typical 5.0V Power Consumption (continued) CY37064 The typical pattern is a 16-bit up counter, per logic block, with ...
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Typical 5.0V Power Consumption (continued) CY37192 The typical pattern is a 16-bit up counter, per logic block, with outputs ...
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Typical 5.0V Power Consumption (continued) CY37384 The ...
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Typical 3.3V Power Consumption CY37032V The typical pattern is a 16-bit up counter, per logic block, with outputs disabled. CY37064V ...
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Typical 3.3V Power Consumption (continued) CY37128V The typical pattern is a 16-bit up counter, per logic block, with outputs disabled. ...
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Typical 3.3V Power Consumption (continued) CY37256V The typical pattern is a 16-bit up counter, per logic block, with outputs ...
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Typical 3.3V Power Consumption (continued) CY37512V The typical pattern is a 16-bit up counter, per logic block, with outputs disabled. [20] Pin ...
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Pin Configurations (continued) I/O 5 CLK JTAG CLK I Note: 20. For 3.3V versions (Ultra37000V CCO CC Document #: 38-03007 Rev. *D 44-pin PLCC (J67) / CLCC (Y67) Top ...
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Pin Configurations (continued I I /TCK I CLK / CCO ...
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Pin Configurations (continued) 100 TCK 1 GND CLK / ...
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Pin Configurations (continued) 100-ball Fine-Pitch BGA (BB100) for CY37064V I/O 24 100-ball ...
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Pin Configurations (continued) GND I I/O /TCK I GND 10 11 I I/O ...
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Pin Configurations (continued) GND I I TCK 6 7 I GND 10 11 I I/O ...
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Pin Configurations (continued) GND I TCK 8 I GND ...
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Pin Configurations (continued GND I/O NC I/O I/O I I/O I/O I/O I/O I/O I I/O NC I/O ...
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Pin Configurations (continued GND GND I/O I GND I/O I/O I I/O I I/O I/O I ...
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Pin Configurations (continued GND GND I/O I/O I/O I/O I/O I GND NC I/O I/O I/O I/O I/O I ...
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Pin Configurations (continued) A GND GND NC I/O I/O I GND GND GND NC I/O I GND GND GND I/O I I/O NC GND I/O I/O I/O 44 ...
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... CY37032P44-200AC CY37032P44-200AXC CY37032P44-200JC CY37032P44-200JXC 154 CY37032P44-154AC CY37032P44-154JC CY37032P44-154AI CY37032P44-154AXI CY37032P44-154JI CY37032P44-154JXI 125 CY37032P44-125AC CY37032P44-125AXC CY37032P44-125JC CY37032P44-125JXC CY37032P44-125AI CY37032P44-125JI Document #: 38-03007 Rev. *D Ultra37000 CPLD Family Operating Conditions Commercial Industrial -40°C to +85°C Military Lead Free X Lead Free Package Type A = Thin Quad Flat Pack (TQFP) ...
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Ordering Information (continued) Macro- Speed cells (MHz) Ordering Code 64 200 CY37064P44-200AC CY37064P44-200AXC CY37064P44-200JC CY37064P44-200JXC CY37064P84-200JC CY37064P100-200AC CY37064P100-200AXC 64 154 CY37064P44-154AC CY37064P44-154JC CY37064P84-154JC CY37064P100-154AC CY37064P44-154AI CY37064P44-154AXI CY37064P44-154JI CY37064P44-154JXI CY37064P84-154JI CY37064P100-154AI 5962-9951902QYA 125 CY37064P44-125AC CY37064P44-125AXC CY37064P44-125JC CY37064P44-125JXC CY37064P84-125JC CY37064P100-125AC CY37064P100-125AXC ...
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Ordering Information (continued) Macro- Speed cells (MHz) Ordering Code 128 167 CY37128P84-167JC CY37128P84-167JXC CY37128P100-167AC CY37128P100-167AXC CY37128P160-167AC CY37128P160-167AXC 125 CY37128P84-125JC CY37128P84-125JXC CY37128P100-125AC CY37128P100-125AXC CY37128P160-125AC CY37128P160-125AXC CY37128P84-125JI CY37128P84-125JXI CY37128P100-125AI CY37128P100-125AXI CY37128P160-125AI CY37128P160-125AXI 5962-9952102QYA 100 CY37128P84-100JC CY37128P84-100JXC CY37128P100-100AC CY37128P100-100AXC CY37128P160-100AC CY37128P160-100AXC CY37128P84-100JI ...
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Ordering Information (continued) Macro- Speed cells (MHz) Ordering Code 256 154 CY37256P160-154AC CY37256P160-154AXC CY37256P208-154NC CY37256P256-154BGC 125 CY37256P160-125AC CY37256P160-125AXC CY37256P208-125NC CY37256P256-125BGC CY37256P160-125AI CY37256P160-125AXI CY37256P208-125NI CY37256P256-125BGI 5962-9952302QZC 83 CY37256P160-83AC CY37256P160-83AXC CY37256P208-83NC CY37256P256-83BGC CY37256P160-83AI CY37256P160-83AXI CY37256P208-83NI CY37256P256-83BGI 5962-9952301QZC 384 125 CY37384P208-125NC CY37384P256-125BGC ...
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Ordering Information (continued) Macro- Speed cells (MHz) Ordering Code 512 125 CY37512P208-125NC CY37512P256-125BGC CY37512P352-125BGC 100 CY37512P208-100NC CY37512P256-100BGC CY37512P352-100BGC CY37512P208-100NI CY37512P256-100BGI CY37512P352-100BGI 5962-9952502QZC 83 CY37512P208-83NC CY37512P256-83BGC CY37512P352-83BGC CY37512P208-83NI CY37512P256-83BGI CY37512P352-83BGI 5962-9952501QZC 3.3V Ordering Information Macro- Speed cells (MHz) Ordering Code ...
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Ordering Information (continued) Macro- Speed cells (MHz) Ordering Code 64 143 CY37064VP44-143AC CY37064VP44-143AXC CY37064VP48-143BAC CY37064VP100-143AC CY37064VP100-143AXC CY37064VP100-143BBC 100 CY37064VP44-100AC CY37064VP44-100AXC CY37064VP48-100BAC CY37064VP100-100AC CY37064VP100-100AXC CY37064VP100-100BBC CY37064VP44-100AI CY37064VP44-100AXI CY37064VP48-100BAI CY37064VP100-100BBI CY37064VP100-100AI CY37064VP100-100AXI 5962-9952001QYA 128 125 CY37128VP100-125AC CY37128VP100-125AXC CY37128VP100-125BBC CY37128VP160-125AC CY37128VP160-125AXC CY37128VP160-125AI ...
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Ordering Information (continued) Macro- Speed cells (MHz) Ordering Code 256 100 CY37256VP160-100AC CY37256VP160-100AXC CY37256VP208-100NC CY37256VP256-100BGC CY37256VP256-100BBC CY37256VP160-100AI CY37256VP160-100AXI 66 CY37256VP160-66AC CY37256VP160-66AXC CY37256VP208-66NC CY37256VP256-66BGC CY37256VP256-66BBC CY37256VP160-66AI CY37256VP256-66BGI CY37256VP256-66BBI 5962-9952401QZC 384 83 CY37384VP208-83NC CY37384VP256-83BGC 66 CY37384VP208-66NC CY37384VP256-66BGC CY37384VP208-66NI CY37384VP256-66BGI 512 83 ...
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Package Diagrams 44-Lead Lead(Pb)-Free Thin Plastic Quad Flat Pack A44 44-Lead Lead(Pb)-Free Plastic Leaded Chip Carrier J67 Document #: 38-03007 Rev. *D Ultra37000 CPLD Family 51-85064-*B 51-85003-*A Page ...
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Package Diagrams (continued) Document #: 38-03007 Rev. *D 44-Lead Ceramic Leaded Chip Carrier Y67 Ultra37000 CPLD Family 51-80014-** Page ...
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Package Diagrams (continued) 48-Ball (7 7 1.2 mm, 0.80 pitch) Thin BGA BA48D 84-Lead Lead(Pb)-Free Plastic Leaded Chip Carrier J83 Document #: 38-03007 Rev. *D Ultra37000 CPLD Family 51-85109-*C 51-85006-*A Page ...
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Package Diagrams (continued) Document #: 38-03007 Rev. *D 84-Lead Ceramic Leaded Chip Carrier Y84 Ultra37000 CPLD Family 51-80095-*A Page ...
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Package Diagrams (continued) 100-Lead Lead (Pb)-Free Thin Plastic Quad Flat Pack (TQFP) A100 Document #: 38-03007 Rev. *D Ultra37000 CPLD Family 51-85048-*B Page ...
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Package Diagrams (continued) 100-Ball Thin Ball Grid Array ( 1.4 mm) BB100 Document #: 38-03007 Rev. *D Ultra37000 CPLD Family 51-85107-*B Page ...
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Package Diagrams (continued) 160-Lead Lead(Pb)-Free Thin Plastic Quad Flat Pack ( 1.4 mm) (TQFP) A160 Document #: 38-03007 Rev. *D Ultra37000 CPLD Family 51-85049-*B Page ...
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Package Diagrams (continued) 160-Lead Ceramic Quad Flatpack (Cavity Up) U162 PIN 1 SEATING PLANE 2.03(.080) 2.79(.110) 0.050(.002) 0.500(.020) Document #: 38-03007 Rev. *D Ultra37000 CPLD Family 25.35±0.10 (.998±.004) TYP. 0.650(.0256) TYP. 0.300(.012) TYP. 28.00 ±0.10 (1.102 ±.004) SQ. 31.20 ±0.25 ...
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Package Diagrams (continued) Document #: 38-03007 Rev. *D 208-Lead Plastic Quad Flatpack N208 Ultra37000 CPLD Family 51-85069-*B Page ...
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Package Diagrams (continued) 208-Lead Ceramic Quad Flatpack (Cavity Up) U208 PIN 1 3.43(.135) 3.94(.155) SEATING PLANE 0.050(.002) 0.500(.020) Document #: 38-03007 Rev. *D 0.50(.0197) TYP. 0.20(.008) TYP. 28.00 ±0.10 (1.102 ±.008) SQ. 31.22 ±0.25 (1.229 ±.010) SQ. SEE DETAIL A ...
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Package Diagrams (continued) Document #: 38-03007 Rev. *D Ultra37000 CPLD Family 256-Ball FBGA ( mm) BB256 51-85108-*F Page ...
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Package Diagrams (continued) 388-Ball PBGA ( 2.33 mm) BG388 Document #: 38-03007 Rev. *D Ultra37000 CPLD Family 51-85103-*C Page ...
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Package Diagrams (continued) ViewDraw and SpeedWave are trademarks of ViewLogic. Windows is a registered trademark of Microsoft Corporation. Warp is a registered trademark, and In-System Reprogrammable, ISR, Warp Professional, Warp Enterprise, and Ultra37000 are trade- marks, of Cypress Semiconductor Corporation. ...
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Addendum 3.3V Operating Range (CY37064VP100-143AC, CY37064VP100-143BBC, CY37064VP44-143AC, CY37064VP48-143B Range Ambient Temperature Commercial Document #: 38-03007 Rev. *D © Cypress Semiconductor Corporation, 2004. The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no responsibility for the ...
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... Changed package diagrams and labels for consistency Added Lead(Pb)-free logo on first page, as well as a note in Features Added Lead(Pb)-free package diagram labels Added Lead-free Parts to Ordering Information CY37032P44-200AXC, CY37032P44-200JXC, CY37032P44-154AXI, CY37032P44-154JXI, CY37032P44-125AXC, CY37032P44-125JXC, CY37064P44-200AXC, CY37064P44-200JXC, CY37064P100-200AXC, CY37064P44-154AXI, CY37064P44-154JXI, CY37064P44-125AXC, CY37064P44-125JXC, CY37064P100-125AXC, CY37064P44-125AXI, CY37064P100-125AXI, CY37128P84-167JXC, CY37128P100-167AXC, ...