PCA9672BS NXP [NXP Semiconductors], PCA9672BS Datasheet - Page 5
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PCA9672BS
Manufacturer Part Number
PCA9672BS
Description
Remote 8-bit I/O expander for Fm+ I2C-bus with interrupt and reset
Manufacturer
NXP [NXP Semiconductors]
Datasheet
1.PCA9672BS.pdf
(27 pages)
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7. Functional description
PCA9672_2
Product data sheet
7.1 Device address
Table 2.
[1]
Refer to
Following a START condition, the bus master must send the address of the slave it is
accessing and the operation it wants to perform (read or write). The address of the
PCA9672 is shown in
addresses. To conserve power, no internal pull-up resistors are incorporated on AD1 and
AD0. Address values depending on AD1 and AD0 can be found in
address
Remark: When using the PCA9672 reserved I
caution since they can interfere with:
The last bit of the first byte defines the operation to be performed. When set to logic 1 a
read is selected, while a logic 0 selects a write operation.
When AD1 and AD0 are held to V
held to V
Symbol
P7
INT
SCL
SDA
V
Fig 6. PCA9672 address
•
•
•
DD
HVQFN package die supply ground is connected to both the V
pin must be connected to supply ground for proper device operation. For enhanced thermal, electrical, and
board-level performance, the exposed pad needs to be soldered to the board using a corresponding
thermal pad on the board, and for proper heat conduction through the board thermal vias need to be
incorporated in the PCB in the thermal pad region.
“reserved for future use” I
1111 111)
slave devices that use the 10-bit addressing scheme (1111 0xx)
High speed mode (Hs-mode) master code (0000 1xx)
Figure 1 “Block diagram of
map”.
SS
Pin description
is applied.
Pin
SO16, TSSOP16
12
13
14
15
16
Remote 8-bit I/O expander for Fm+ I
Figure
Rev. 02 — 6 July 2007
…continued
6. Slave address pins AD1 and AD0 choose 1 of 16 slave
2
A6
C-bus addresses (0000 011, 1111 101, 1111 110,
HVQFN16
10
11
12
13
14
DD
A5
PCA9672”.
or V
programmable
slave address
A4
SS
A3
, the same address as the PCF8574 with A2
Description
quasi-bidirectional I/O 7
interrupt output (active LOW)
serial clock line
serial data line
supply voltage
A2
2
C-bus addresses must be used with
A1
A0
002aab636
SS
pin and the exposed center pad. The V
2
R/W
C-bus with interrupt and reset
Table 3 “PCA9672
PCA9672
© NXP B.V. 2007. All rights reserved.
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SS