PCA9558 PHILIPS [NXP Semiconductors], PCA9558 Datasheet - Page 5

no-image

PCA9558

Manufacturer Part Number
PCA9558
Description
8-bit I2C and SMBus I/O port with 5-bit multiplexed/1-bit latched 6-bit I2C EEPROM and 2 k bit EEPROM
Manufacturer
PHILIPS [NXP Semiconductors]
Datasheet

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PCA9558PW118
Manufacturer:
NXP Semiconductors
Quantity:
135
1. To ensure data integrity, the EEPROM must be internally write protected when V
Philips Semiconductors
I
Communicating with this device is initiated by sending a valid address on the I
one user-programmable bits followed by a 1-bit read/write value which determines the direction of the data transfer.
Following the address and acknowledge bit are 8 data bits which, depending on the read/write bit in the address, will read data from or write
data to the EEPROM. Data will be written to the register if the read/write bit is logic 0 and the WP input is logic 0. Data will be read from the
register if the bit is logic 1. The four high-order bits are latched outputs, while the four low order bits are multiplexed outputs (Figure 3).
NOTE:
2002 May 24
2
C INTERFACE
8-bit I
latched 6-bit I
is dropped below normal operating levels.
2
C and SMBus I/O port with 5-bit multiplexed/1-bit
MSB
MSB
MSB
0
0
1
2
C EEPROM and 2 k bit EEPROM
MSB
MSB LSB
0000 0001
0000 0011
0000 0100
0000 0110
0000 0111
0000 1000
0000 1001
0000 1010
0000 1011
0000 1100
0000 1101
0000 1110
0000 1111
0001 0000
0001 0001
0001 0010
0001 0011
1111 1111
0
0
to
0
Write to 256EE via I
Read from 256EE via I
Write to 6bitEE via I
Read from 6bitEE via I
Read IP (Input Port) Register via I
Read/Write OP (Output Port) Register via I
Read/Write PI (Polarity Inversion) Register via I
Read/Write IOC (Input/Output Configuration Register via I
Read/Write MUXCNTRL (Mux Control) Register via I
Read MUXIN values via I
Reserved
Reserved
Read 256EE and Write OP Register
Read 256EE and Write PI Register
Read 256EE and Write IOC Register
Read IP Register and Write to 256EE
Reserved
Reserved
Non_muxed
Data
0
0
Figure 3. I
Figure 4. I
2
2
Figure 1. I
C
C
Figure 2. Command Byte
MUX_IN E
2
2
Data E
C
C
Mux
2
C
1
2
C MUX_OUT Data Byte
2
C MUX_IN Data Byte
2
C
2
C Address Byte
5
MUX_IN D
Data D
2
Mux
C
2
2
1
C
C bus. The address format (see FIgure 1) has 6 fixed bits and
2
C
LSB
CC
2
MUX_IN C
C
to the I
Data C
Mux
1
2
C bus is powered down or V
MUX_IN B
Data B
Mux
A0
SW00634
MUX_IN A
Data A
Mux
SW00456
SW00528
R/W#
SW00615
LSB
LSB
CC
LSB
PCA9558
to the component
Product data

Related parts for PCA9558