PCA9540D PHILIPS [NXP Semiconductors], PCA9540D Datasheet - Page 4

• Manufacturer Part Number: PCA9540D
• Description: 2-channel I2C multiplexer
• Manufacturer: PHILIPS [NXP Semiconductors]

Philips Semiconductors
CHANNEL SELECTION
A SC0x/SD0x downstream pair, or channel, is selected by the
contents of the control register. This register is written after the
PCA9540 has been addressed. The 2 LSBs of the control byte are
used to determine which channel is to be selected. When a channel
is selected, the channel will become active after a stop condition has
been placed on the I
be in a HIGH state when the channel is made active, so that no
false conditions are generated at the time of connection.
CONTROL REGISTER
POWER-ON RESET
During power-up the control register defaults to all zeroes causing
all the channels to be deselected.
1999 Dec 15
X
X
X
7
2-channel I
SDA
SCL
6
X
X
X
TRANSMITTER/
X
X
X
CONTROL BYTE
5
RECEIVER
MASTER
X
7
2
C bus. This ensures that all SCx/SDx lines will
X
X
X
4
X
6
2
C multiplexer
SDA
SCL
X
5
X
X
X
3
X
4
2
0
1
1
START condition
3
X
RECEIVER
SLAVE
1
X
0
0
B2
Channel select bits
2
S
(read/write)
1
B1
0
X
0
1
Figure 2. Definition of start and stop conditions
B0
0
0 (SC0/SD0)
1 (SC1/SD1)
SELECTED
CHANNEL
Figure 3. System configuration
TRANSMITTER/
none
SW00497
RECEIVER
SLAVE
4
CHARACTERISTICS OF THE I
The I
or modules. The two lines are a serial data line (SDA) and a serial
clock line (SCL). Both lines must be connected to a positive supply
via a pull-up resistor when connected to the output stages of a device.
Data transfer may be initiated only when the bus is not busy.
Bit transfer
One data bit is transferred during each clock pulse. The data on the
SDA line must remain stable during the HIGH period of the clock
pulse as changes in the data line at this time will be interpreted as
control signals (see FIgure 1).
Start and stop conditions
Both data and clock lines remain HIGH when the bus is not busy. A
HIGH-to-LOW transition of the data line, while the clock is HIGH is
defined as the start condition (S). A LOW-to-HIGH transition of the
data line while the clock is HIGH is defined as the stop condition (P)
(see Figure 2).
System configuration
A device generating a message is a ‘transmitter’, a device receiving
is the ‘receiver’. The device that controls the message is the
‘master’ and the devices which are controlled by the master are the
‘slaves’ (see Figure 3).
TRANSMITTER
MASTER
SDA
SCL
2
C-bus is for 2-way, 2-line communication between different ICs
STOP condition
TRANSMITTER/
data valid
RECEIVER
data line
Figure 1. Bit transfer
MASTER
stable;
P
SLAVE
change
allowed
of data
SW00365
SDA
SCL
2
C-BUS
MULTIPLEXER
I
2
C
Product specification
PCA9540
SW00366
SW00363