AT84AD001BCTD ATMEL [ATMEL Corporation], AT84AD001BCTD Datasheet - Page 49
AT84AD001BCTD
Manufacturer Part Number
AT84AD001BCTD
Description
Dual 8-bit 1 Gsps ADC
Manufacturer
ATMEL [ATMEL Corporation]
Datasheet
1.AT84AD001BCTD.pdf
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Table 16. Definitions of Terms (Continued)
2153C–BDC–04/04
Abbreviation
TRDR
TS
VSWR
Definition
Data Ready Reset
Delay
Settling Time
Voltage Standing
Wave Ratio
Description
The delay between the falling edge of the Data Ready output asynchronous reset signal
(DDRB) and the reset to digital zero transition of the Data Ready output signal (DR)
The time delay to rise from 10% to 90% of the converter output when a full-scale step
function is applied to the differential analog input
The VSWR corresponds to the ADC input insertion loss due to input power reflection. For
example, a VSWR of 1.2 corresponds to a 20 dB return loss (99% power transmitted and 1%
reflected)
AT84AD001B
49
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