TDA8360 PHILIPS [NXP Semiconductors], TDA8360 Datasheet - Page 17

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TDA8360

Manufacturer Part Number
TDA8360
Description
Integrated PAL and PAL/NTSC TV processors
Manufacturer
PHILIPS [NXP Semiconductors]
Datasheet
Philips Semiconductors
March 1994
Delay line and peaking circuit
Y
t
B
PEAKING CONTROL
t
S
I
V
Horizontal and vertical synchronization circuits
S
V
SL
VERTICAL SYNC
t
H
f
F
f
f
S/N
HYS
d
W
14
W
fr
HR
CR
f
f
f
f
IRST CONTROL LOOP
cth
I
YNC VIDEO INPUT
13
ORIZONTAL OSCILLATOR
Integrated PAL and PAL/NTSC TV
processors
SYMBOL
fr
osc
osc
osc( max
DELAY LINE
/ V
/ T
P
)
delay time
bandwidth of internal delay line
width of preshoot or overshoot
peaking signal compression
threshold
input current when no video input
signal present
voltage level to switch off peaking
sync pulse amplitude
slicing level
width of the vertical sync pulse
without sync instability
free running frequency
spread on free running frequency
frequency variation with respect to
the supply voltage
frequency variation with temperature
maximum frequency deviation at the
start of the horizontal output
holding range PLL
catching range PLL
signal-to-noise ratio of the video input
signal at which the time constant is
switched
hysteresis at the switching point
;
(
NOTE
TDA
;
NOTE
8361,
28,
PARAMETER
31 (
SEE ALSO FIG
TDA
FILTER CONNECTED TO PIN
8362;
PINS
.6 (
13
PIN
AND
14)
15)
note 7
note 7
at 50% of pulse;
note 7
referenced to pin 15;
note 3
note 29
note 30
note 44
V
note 7
T
note 7
note 7
amb
P
40)
17
= 8 V 10%;
CONDITIONS
= 25 C 50 C;
TDA8360; TDA8361; TDA8362
8
50
22
0.6
MIN.
480
160
50
1
7
300
50
15625
0.2
1
20
3
0.9
0.9
TYP.
Objective specification
0.5
75
2
1.2
MAX.
ns
MHz
ns
IRE
mA
V
mV
%
Hz
%
%
Hz/K
%
kHz
kHz
dB
dB
s
UNIT

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