AD9287BCPZRL-100 AD [Analog Devices], AD9287BCPZRL-100 Datasheet - Page 26

• Manufacturer Part Number: AD9287BCPZRL-100
• Description: Quad, 8-Bit, 100 MSPS Serial LVDS 1.8 V A/D Converter
• Manufacturer: AD [Analog Devices]

AD9287
Voltage Reference
A stable and accurate 0.5 V voltage reference is built into the
AD9287. This is gained up by a factor of 2 internally, setting
V
of 2 V p-p. The V
VREF pin can be driven externally with a 1.0 V reference to
achieve more accuracy.
When applying the decoupling capacitors to the VREF, REFT,
and REFB pins, use ceramic low ESR capacitors. These capacitors
should be close to the ADC pins and on the same layer of the
PCB as the AD9287. The recommended capacitor values and
configurations for the AD9287 reference pin can be found in
Figure 55.
Table 12. Reference Settings
Selected
Mode
External
Internal,
REF
Reference
2 V p-p FSR
to 1.0 V, which results in a full-scale differential input span
70
65
60
55
50
600
500
400
300
200
100
2
0
2
SNR
Figure 54. IAVDD vs. RBIAS Resistance
SENSE
Voltage
AVDD
AGND to 0.2 V
Figure 53. SFDR vs. RBIAS Resistance
6
REF
SFDR
is set internally by default; however, the
7
RBIAS RESISTANCE (kΩ)
RBIAS RESISTANCE (kΩ)
10
12
Resulting
VREF (V)
N/A
1.0
14
17
18
2.0
Resulting
Differential
Span (V p-p)
2 × external
22
22
reference
50
48
46
44
42
40
38
36
34
32
30
Rev. 0 | Page 26 of 52
Internal Reference Operation
A comparator within the AD9287 detects the potential at the
SENSE pin and configures the reference. If SENSE is grounded,
the reference amplifier switch is connected to the internal
resistor divider (see Figure 55), setting VREF to 1 V.
The REFT and REFB pins establish their input span of the ADC
core from the reference configuration. The analog input full-
scale range of the ADC equals twice the voltage at the reference
pin for either an internal or an external reference configuration.
If the reference of the AD9287 is used to drive multiple
converters to improve gain matching, the loading of the refer-
ence by the other converters must be considered. Figure 57
depicts how the internal reference voltage is affected by loading.
1µF
1
1µF
OPTIONAL.
REFERENCE
1
EXTERNAL
SENSE
0.1µF
SENSE
0.1µF
V
VIN+
VIN–
V
AVDD
VIN+
VIN–
REF
REF
1
Figure 55. Internal Reference Configuration
Figure 56. External Reference Operation
SELECT
LOGIC
SELECT
LOGIC
CORE
CORE
ADC
ADC
0.5V
0.5V
REFT
REFB
REFT
REFB
0.1µF
0.1µF
0.1µF
0.1µF
0.1µF
0.1µF
+
+
2.2µF
2.2µF