STLC3055N_09 STMICROELECTRONICS [STMicroelectronics], STLC3055N_09 Datasheet - Page 6

• Manufacturer Part Number: STLC3055N_09
• Description: WLL and ISDN-TA subscriber line interface circuit
• Manufacturer: STMICROELECTRONICS [STMicroelectronics]

Pin description
2
Figure 2.
Table 2.
6/34
38,39,40,42
6,7,36,
N°
10
11
12
13
14
15
16
1
2
3
4
5
8
9
Pin description
Pin connection (top view)
Pin description
Gain SET
CKTTX
CTTX1
CTTX2
RTTX
FTTX
ZAC1
DET
ZAC
Pin
PD
NC
RX
D0
D1
D2
Control Interface: input bit 0.
Control Interface: input bit 1.
Control interface: input bit 2.
Power down input. Normally connected to CVCC (or to logic level high).
Control gain interface:
Not connected.
Logic interface output of the supervision detector (active low).
Metering pulse clock input (12 KHz or 16KHz square wave).
Metering burst shaping external capacitor.
Metering burst shaping external capacitor.
Metering pulse cancellation buffer output. TTX filter network should be connected to
this point. If not used should be left open.
Metering pulse buffer input this signal is sent to the line and used to perform TTX
filtering.
4 wire input port (RX input). A 100 kΩ external resistor must be connected to AGND to
bias the input stage. This signal is referred to AGND. If connected to single supply
CODEC output it must be DC decoupled with proper capacitor.
RX buffer output, (the AC impedance is connected from this node to ZAC).
AC impedance synthesis.
GAIN SET
CKTTX
CTTX1
CTTX2
N.C.
N.C.
DET
PD
D0
D1
D2
1
2
3
4
5
6
7
8
9
10
11
44
12
43
13
42
14
41
15
0 Level R
1 Level R
40
16
39
17
38
18
37
19
xgain
xgain
36
20
Function
= 0dB
= +6dB T
35
21
34
22
33
32
31
30
29
28
27
26
25
24
23
D00TL488-MOD
T
xgain
xgain
CSVR
ILTF
RD
RTH
IREF
RLIM
AGND
CVCC
VPOS
RSENSE
GATE
= -6dB
= -12dB
STLC3055N