74LVC377 PHILIPS [NXP Semiconductors], 74LVC377 Datasheet - Page 2

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74LVC377

Manufacturer Part Number
74LVC377
Description
Octal D-type flip-flop with data enable; positive-edge trigger
Manufacturer
PHILIPS [NXP Semiconductors]
Datasheet

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1 C
Philips Semiconductors
FEATURES
QUICK REFERENCE DATA
GND = 0V; T
NOTES:
ORDERING INFORMATION
PIN CONFIGURATION
t
f
f
C
C
20-Pin Plastic SO
20-Pin Plastic SSOP Type II
20-Pin Plastic TSSOP Type I
1998 Jul 29
PHL
max
Wide supply voltage range of 1.2V to 3.6V
Conforms to JEDEC standard 8-1A
Inputs accept voltages up to 5.5V
CMOS low power consumption
Direct interface with TTL levels
Output drive capability 50 transmission lines @ 85 C
Octal D-type flip-flop with data enable;
positive-edge trigger
I
PD
P
f
f
S (C
i
o
PD
D
= input frequency in MHz; C
/t
= output frequency in MHz; V
PLH
= C
SYMBOL
L
is used to determine the dynamic power dissipation (P
PD
V
amb
PACKAGES
CC
V
2
= 25 C; t
CC
GND
2
f
Q0
D0
D1
Q1
Q2
D2
D3
Q3
o
x f
E
) = sum of the outputs.
i
10
1
2
3
4
5
6
7
8
9
r
Propagation delay
CP to Qn;
Maximum clock frequency
Maximum clock frequency
Input capacitance
Power dissipation
capacitance per flip-flop
)S (C
=t
f
v2.5 ns
L
L
= output load capacity in pF;
CC
V
SY00058
= supply voltage in V;
CC
PARAMETER
TEMPERATURE RANGE
2
20
19
18
17
16
15
14
13
12
11
–40 C to +85 C
–40 C to +85 C
–40 C to +85 C
V
Q7
D7
D6
Q6
Q5
D5
D4
Q4
CP
f
o
CC
) where:
D
in W)
OUTSIDE NORTH AMERICA
C
V
V
L
CC
I
2
= GND to V
= 50pF
= 3.3V
DESCRIPTION
The 74LVC377 is a low-voltage Si-gate CMOS device, superior to
most advanced CMOS compatible TTL families.
The 74LVC377 has eight edge-triggered , D-type flip-flops with
individual D inputs and Q outputs. A common clock (CP) input loads
all flip-flops simultaneously when the data enable E is LOW. The
state of each D input, one set-up time before the LOW-to-HIGH
clock transition, is transferred to the corresponding output (Qn) of
the flip-flop. The E input must be stable only one set-up time prior to
the LOW-to-HIGH transition for predictable operation.
PIN DESCRIPTION
74LVC377 PW
74LVC377 DB
74LVC377 D
NUMBER
9, 12, 15,
8, 13, 14,
CONDITIONS
2, 5, 6,
3, 4, 7,
16, 19
17, 18
PIN
10
11
20
1
CC
1
SYMBOL
Q0 – Q7
D0 – D7
GND
V
CP
E
CC
NORTH AMERICA
74LVC377PW DH
74LVC377 DB
74LVC377 D
Data enable input (active LOW)
Flip-flop outputs
Data inputs
Ground (0V)
Clock input (LOW-to-HIGH,
Positive power supply
edge-triggered)
TYPICAL
230
230
6.0
5.0
22
FUNCTION
Product specification
74LVC377
DWG NUMBER
SOT163-1
SOT339-1
SOT360-1
UNIT
MHz
MHz
pF
pF
ns

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