M41T65 STMICROELECTRONICS [STMicroelectronics], M41T65 Datasheet - Page 18

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M41T65

Manufacturer Part Number
M41T65
Description
Serial real-time clocks with alarm
Manufacturer
STMICROELECTRONICS [STMicroelectronics]
Datasheet

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Clock operation
3.1
Figure 20. Buffer/transfer registers
18/41
I
2
C
2
INTERFACE
RTC registers
The M41T6x user interface is comprised of 16 memory mapped registers which include
clock, calibration, alarm, watchdog, flags, and square wave control. The eight clock
counters are accessed indirectly via a set of buffer/transfer registers while the other eight
registers are directly accessed. Data in the clock and alarm registers is in BCD format.
Updates
During normal operation when the user is not accessing the device, the buffer/transfer
registers are kept updated with a copy of the RTC counters. At the start of an I
write cycle, the updating is halted and the present time is frozen in the buffer/transfer
registers.
Reads of the clock registers
By halting the updates at the start of an I
transferred out during a read sequence comes from the same instant in time.
DATA TRANSFERRED
OUT OF I
ON 8
OF SCL (ON WRITES)
I
2
NON-CLOCK REGISTERS
ARE DIRECTLY ACCESSED
C
th
FALLING EDGE
2
C INTERFACE
AT START OF READ, UDATES FROM COUNTERS
ARE HALTED AND PRESENT TIME IS FROZEN
IN BUFFER/TRANSFER REGISTERS.
READ / WRITE
BUFFER
TRANSFER
REGISTERS
Doc ID 10397 Rev 14
NON-CLOCK
REGISTERS
CALIBRATION
WATCHDOG
FLAGS
DAY-OF-WEEK
CENTURIES
SECONDS
MINUTES
MONTHS
2
HOURS
YEARS
C access, the user is ensured that all the data
DATE
ON WRITES, DATA TRANSFERRED
FROM BUFFERS TO COUNTERS
WHEN ADDRESS POINTER
INCREMENTS TO 8 OR WHEN I
STOP CONDITION IS RECEIVED
CLOCK COUNTERS ARE
ACCESSED INDIRECTLY
THRU BUFFER/TRANSFER
REGISTERS
DIVIDE BY
COUNTER
COUNTER
COUNTER
COUNTER
COUNTER
COUNTER
COUNTER
32KHz
32768
OSC
M41T62/63/64/65
1 Hz
COUNTER
2
2
C
C read or
AM04890v1

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