74LVC245A-Q100 NXP [NXP Semiconductors], 74LVC245A-Q100 Datasheet - Page 3

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74LVC245A-Q100

Manufacturer Part Number
74LVC245A-Q100
Description
Octal bus transceiver; 3-state
Manufacturer
NXP [NXP Semiconductors]
Datasheet
NXP Semiconductors
5. Pinning information
Table 2.
74LVC_LVCH245A_Q100
Product data sheet
Symbol
DIR
A0 to A7
GND
B0 to B7
OE
V
Fig 3.
CC
Pin configuration for SO20 and TSSOP20
Pin description
GND
DIR
A0
A1
A2
A3
A4
A5
A6
A7
10
5.1 Pinning
1
2
3
4
5
6
7
8
9
5.2 Pin description
Pin
1
2, 3, 4, 5, 6, 7, 8, 9
10
18, 17, 16, 15, 14, 13, 12, 11
19
20
74LVCH245A-Q100
74LVC245A-Q100
aaa-003142
All information provided in this document is subject to legal disclaimers.
20
19
18
17
16
15
14
13
12
11
V
OE
B0
B1
B2
B3
B4
B5
B6
B7
CC
Rev. 1 — 3 September 2012
Description
direction control
data input/output
ground (0 V)
data input/output
output enable input (active LOW)
supply voltage
Fig 4.
74LVC_LVCH245A_Q100
(1) This is not a supply pin. The substrate is attached to this
pad using conductive die attach material. There is no
electrical or mechanical requirement to solder this pad.
However, if it is soldered, the solder land should remain
floating or be connected to GND.
Pin configuration for DHVQFN20
index area
terminal 1
A0
A1
A2
A3
A4
A5
A6
A7
74LVCH245A-Q100
74LVC245A-Q100
Transparent top view
2
3
4
5
6
7
8
9
Octal bus transceiver; 3-state
GND
(1)
aaa-003143
19
18
17
16
15
14
13
12
© NXP B.V. 2012. All rights reserved.
OE
B0
B1
B2
B3
B4
B5
B6
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