PCA88021 NXP [NXP Semiconductors], PCA88021 Datasheet - Page 7

• Manufacturer Part Number: PCA88021
• Description: ultra low power oscillator with integrated counter for initiating one time password generation
• Manufacturer: NXP [NXP Semiconductors]

NXP Semiconductors
PCA8802_1
Product data sheet
9.3 Binary counter
A 24 bit binary roll over counter is implemented. The counter is reset at power-on.
The counter can be set to any value using the set_cmd instruction. The set_cmd
instruction allows partial writing of data. Partial writing of the data parameters will result in
partial setting of the counter, e.g. if data transfer is stopped after P1[23:16] (see
transmitted, then only bit 23 to bit 16 will be updated. The counter will not increment whilst
being set.
The counter can be halted by means of stopping the dividers using the dvs_cmd
instruction.
The counter can be read at any time and the counter value will remain stable during
reading. If the counter is due to increment during the read or write cycle, then the request
to increment will be held off until after the read has concluded. For this reason it is
important to read the counter in bursts, ensuring that an interface STOP condition (see
Section
32 seconds at a time will result in loss of counts.
Fig 7.
Fig 8.
32.768 kHz
(1) Increment delayed until after the read has finished.
9.5.4) is present between read accesses. Reading for periods of more then
Divider_1 = dividing by 4.
Divider_2 = dividing by 8192.
Divider_3 = dividing by 32.
Divider chain
Counter behavior during read access
interface state
1/32 Hz pulse
counter state
DIVIDER_1
Rev. 01 — 19 February 2009
free
8.192 kHz
dvs_cmd - divider stop command
increment
OSCILLATOR
DETECTOR
DIVIDER_2
STOP
reset
frozen
read
1 Hz
free
power-on reset signal
clock for fast mode
DIVIDER_3
reset
frozen
read
(1)
1/32 Hz
PCA8802
increment
© NXP B.V. 2009. All rights reserved.
001aaj206
Smartcard RTC
clock
COUNTER
24-BIT
Table
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