PCF8558U/10 PHILIPS [NXP Semiconductors], PCF8558U/10 Datasheet - Page 9

• Manufacturer Part Number: PCF8558U/10
• Description: Universal LCD driver for small graphic panels
• Manufacturer: PHILIPS [NXP Semiconductors]

Philips Semiconductors
I
Two 7-bit slave addresses (0111100 and 0111101) are
reserved for both the PCF8558. The least-significant bit of
the slave address is set by connecting input SA0 to
either 0 (V
used on the same I
80
The I
All communications are initiated with a START condition
(S) from the I
desired slave address and write bit. All devices with this
slave address acknowledge in parallel. All other devices
ignore the bus transfer.
In write mode (indicated by setting the read/write bit LOW)
one or more commands follow the slave address
acknowledgement. The commands are also
acknowledged by all addressed devices on the bus.
The last command must clear the continuation bit C. After
the last command a series of data bytes may follow.
The acknowledgement after each byte is made only by the
addressed device. After the last data byte has been
acknowledged, the I
condition (P).
For PCF8558, no read mode is provided.
Display bytes are written into the RAM at the address
specified by the data pointer and subaddress counter.
Both the data pointer and subaddress counter are
1998 Apr 07
2
handbook, full pagewidth
C-BUS PROTOCOL
Universal LCD driver for small graphic
panels
101 or 40
2
C-bus protocol is shown in Fig.6.
SS
) or 1 (V
2
C-bus master, which is followed by the
S 0 1 1 1 1 0
202 dots to be driven.
2
slave address
C-bus allowing displays of up to
2
DD
C-bus master issues a STOP
). Therefore, two PCF8558 can be
O
S
A
R/W
C
A
K
COMMAND
Fig.6 I
2
C-bus protocol.
C
A
K
9
automatically incremented, enabling a stream of data to be
transferred to the DDRAM.
The instruction format is composed of I
address followed by one command byte, one X address
pointer, followed by any number of data bytes.
Command execution/storing of data takes place during the
acknowledge cycle.
Definitions
Transmitter: the device which sends the data to the bus
Receiver: the device which receives the data from the
bus
Master: the device which initiates a transfer, generates
clock signals and terminates a transfer
Slave: the device addressed by a master
Multi-master: more than one master can attempt to
control the bus at the same time. The I
accommodate this without data los/contention.
Arbitration: procedure to ensure that, if more than one
master simultaneously tries to control the bus, only one
is allowed to do so and the message is not corrupted
Synchronization: procedure to synchronize the clock
signals of two or more devices.
X ADDRESS
C
A
K
DISPLAY DATA
N
0 bytes
Objective specification
MGG563
C
A
K
2
C-bus slave
PCF8558
2
P
C-bus can