74LVC1G18 PHILIPS [NXP Semiconductors], 74LVC1G18 Datasheet - Page 2

• Manufacturer Part Number: 74LVC1G18
• Description: 1-of-2 non-inverting demultiplexer with 3-state deselected output
• Manufacturer: PHILIPS [NXP Semiconductors]

Philips Semiconductors
FEATURES
QUICK REFERENCE DATA
GND = 0 V; T
Notes
1. C
2. The condition is V
2003 Jul 25
t
C
C
PHL
SYMBOL
Wide supply voltage range from 1.65 to 5.5 V
5 V tolerant input/output for interfacing with 5 V logic
High noise immunity
Complies with JEDEC standard:
– JESD8-7 (1.65 to 1.95 V)
– JESD8-5 (2.3 to 2.7 V)
– JESD8B/JESD36 (2.7 to 3.6 V).
ESD protection:
– HBM EIA/JESD22-A114-A exceeds 2000 V
– MM EIA/JESD22-A115-A exceeds 200 V.
CMOS low power consumption
Latch-up performance exceeds 250 mA
Direct interface with TTL levels
SOT363 and SOT457 package
Specified from 40 to +85 C and 40 to +125 C.
I
PD
1-of-2 non-inverting demultiplexer with
3-state deselected output
24 mA output drive (V
P
f
f
C
V
N = total load switching outputs;
i
o
/t
D
CC
PD
= input frequency in MHz;
L
PLH
= output frequency in MHz;
(C
= output load capacitance in pF;
= C
is used to determine the dynamic power dissipation (P
= supply voltage in Volts;
L
PD
V
amb
CC
propagation delay input A to output nY
input capacitance
power dissipation capacitance per gate
V
2
CC
= 25 C.
f
2
o
) = sum of outputs.
I
f
= GND to V
i
CC
N +
PARAMETER
= 3.0 V)
(C
CC
L
.
V
CC
2
f
o
) where:
V
V
V
V
V
V
CC
CC
CC
CC
CC
CC
2
DESCRIPTION
The 74LVC1G18 is a high-performance, low-power,
low-voltage, Si-gate CMOS device, superior to most
advanced CMOS compatible TTL families.
Input can be driven from either 3.3 or 5 V devices. These
features allow the use of these devices in a mixed
3.3 and 5 V environment.
This device is fully specified for partial power-down
applications using I
preventing the damaging backflow current through the
device when it is powered down.
The 74LVC1G18 is a 1-of-2 non-inverting demultiplexer
with a 3-state output. The 74LVC1G18 buffers the data on
input pin A and passes it either to output 1Y or 2Y,
depending on whether the state of the select input (pin S)
is LOW or HIGH.
= 1.8 V; C
= 2.5 V; C
= 2.7 V; C
= 3.3 V; C
= 5.0 V; C
= 3.3 V; notes 1 and 2
D
in W).
CONDITIONS
L
L
L
L
L
= 30 pF; R
= 30 pF; R
= 50 pF; R
= 50 pF; R
= 50 pF; R
off
. The I
L
L
L
L
L
= 1 k
= 500
= 500
= 500
= 500
off
circuitry disables the output,
Product specification
5.1
3.2
3.2
3.0
2.3
2.5
28.8
TYPICAL
74LVC1G18
ns
ns
ns
ns
ns
pF
pF
UNIT