M4T32-BR12SH STMICROELECTRONICS [STMicroelectronics], M4T32-BR12SH Datasheet - Page 22

• Manufacturer Part Number: M4T32-BR12SH
• Description: 5.0 OR 3.0V, 512 bit 64 x 8 SERIAL RTC and NVRAM SUPERVISOR
• Manufacturer: STMICROELECTRONICS [STMicroelectronics]

M41ST85Y, M41ST85W
t
Bit D7 of Clock Register 04h contains the t
(TR). t
the deselect time after V
lows for a voltage settling time before WRITEs
may again be performed to the device after a pow-
er-down condition. The t
set the length of this deselect time as defined by
Table 6., page
Table 6. t
Note: 1. Default Setting
Table 7. Default Values
Note: 1. WDS, BMB0-BMB4, RB0, RB1.
22/34
rec
Initial Power-up
Subsequent Power-up (with
battery back-up)
Bit
2. State of other control bits undefined.
3. UC = Unchanged
t
rec
rec
Bit (TR)
rec
0
0
1
refers to the automatic continuation of
Condition
Definitions
(2)
22.
(3)
rec
CC
STOP Bit (ST)
Bit will allow the user to
reaches V
X
0
1
UC
TR
0
PFD
UC
ST
1
. This al-
rec
Bit
HT
1
1
Min
96
40
50
Initial Power-on Defaults
Upon initial application of power to the device, the
following register bits are set to a '0' state: Watch-
dog Register, FT, AFE, ABE, SQWE, and TR. The
following bits are set to a '1' state: ST, OUT, and
HT (see
Out
UC
1
t
rec
Time
FT
Table 7., page
0
0
AFE
200
0
0
2000
Max
98
(1)
ABE
0
0
22).
SQWE
0
0
Units
WATCHDOG
ms
ms
Register
µs
0
0
(1)