TSA5060AT PHILIPS [NXP Semiconductors], TSA5060AT Datasheet - Page 2

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TSA5060AT

Manufacturer Part Number
TSA5060AT
Description
1.3 GHz I2C-bus controlled low phase noise frequency synthesizer
Manufacturer
PHILIPS [NXP Semiconductors]
Datasheet

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Philips Semiconductors
FEATURES
APPLICATIONS
GENERAL DESCRIPTION
The TSA5060A is a single chip PLL frequency synthesizer
designed for terrestrial and cable tuning systems up to
1.3 GHz.
The RF preamplifier drives the 17-bit main divider enabling
a step size equal to the comparison frequency, for an input
frequency up to 1.3 GHz covering the complete terrestrial
frequency range. A fixed divide-by-two additional
prescaler can be inserted between the preamplifier and
the main divider. In this case, the step size is twice the
comparison frequency.
2000 Oct 24
Complete 1.3 GHz single chip system
Optimized for low phase noise
Selectable divide-by-two prescaler
Operation up to 1.3 GHz without divide-by-two prescaler
Selectable reference divider ratio
Compatible with UK-DTT (Digital Terrestrial Television)
offset requirements
Selectable crystal or comparison frequency output
Four selectable charge pump currents
Four selectable I
Standard and fast mode I
I
5-level Analog-to-Digital Converter (ADC)
Low power consumption
Three I/O ports and one output port.
Digital terrestrial and cable tuning systems
Hybrid (digital and analog) terrestrial and cable tuning
systems
Digital set-top boxes.
1.3 GHz I
noise frequency synthesizer
2
C-bus compatible with 3.3 and 5 V microcontrollers
2
C-bus controlled low phase
2
C-bus addresses
2
C-bus
2
The comparison frequency is obtained from an on-chip
crystal oscillator that can also be driven from an external
source. Either the crystal frequency or the comparison
frequency can be switched to the XT/COMP output pin to
drive the reference input of another synthesizer or the
clock input of a digital demodulation IC.
Both divided and comparison frequencies are compared in
the fast phase detector which drives the charge pump.
The loop amplifier is also on-chip, however an external
NPN transistor to drive directly the 33 V tuning voltage.
Control data is entered via the I
required to address the device, select the main divider
ratio, the reference divider ratio, program the four output
ports, set the charge pump current, select the prescaler by
two, select the signal to switch to the XT/COMP output pin
and select a specific test mode. Three of the four output
ports can also be used as input ports and a 5-level ADC is
provided. Digital information concerning the input ports
and the ADC can be read out of the TSA5060A on the SDA
line (one status byte) during a READ operation. A flag is
set when the loop is ‘in-lock’ and is read during a READ
operation, as well as the Power-on reset flag. The device
has four programmable addresses, programmed by
applying a specific voltage at pin AS, enabling the use of
multiple synthesizers in the same system.
2
C-bus; five serial bytes are
Product specification
TSA5060A

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